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公开(公告)号：US11776466B2
公开(公告)日：2023-10-03
申请号：US17935372
申请日：2022-09-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Jin Sung An , Seok Je Seong , Ji Seon Lee , Se Wan Son
CPC classification number: G09G3/32 , H01L33/16 , H01L33/62 , G09G2300/0426 , G09G2310/0267 , G09G2310/0275
Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.
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公开(公告)号：US10916620B2
公开(公告)日：2021-02-09
申请号：US16799296
申请日：2020-02-24
Applicant: Samsung Display Co., LTD.
Inventor： Jin Sung An , Young Woo Park , Se Wan Son , Moo Soon Ko , Jeong-Soo Lee , Ji Seon Lee , Deuk Myung Ji
IPC: H01L27/32 , H01L51/56 , G09G3/3275 , H01L51/52 , G09G3/3266
Abstract: A display device including: a substrate; an active layer, and including channel and conductive regions and; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.
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公开(公告)号：US10784316B2
公开(公告)日：2020-09-22
申请号：US16148436
申请日：2018-10-01
Applicant: SAMSUNG DISPLAY CO. LTD.
Inventor： Ji Seon Lee , Moo Soon Ko , Young Woo Park , Se Wan Son , Jin Sung An , Min Woo Woo , Ju Won Yoon , Wang Woo Lee , Jeong Soo Lee , Deuk Myung Ji
Abstract: A display device includes a substrate including a display area and a non-display area. First, second, and third insulating layers are sequentially disposed on the substrate. Pixels are disposed in the display area. Each of the pixels including a transistor and a light emitting element connected to the transistor. A data line is disposed in the display area. The data line is configured to supply a data signal to each of the plurality of pixels. A wiring portion is disposed in the non-display area. The wiring portion includes a connecting line connected to the data line and a fan-out line connected to the connecting line. A dummy pattern is disposed in the non-display area. The dummy pattern at least partially overlaps the wiring portion.
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公开(公告)号：US20190206952A1
公开(公告)日：2019-07-04
申请号：US16133836
申请日：2018-09-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： JI SEON LEE , Moo Soon Ko , Se Wan Son , Jin Sung An , Seong Jun Lee , Wang Woo Lee
IPC: H01L27/32
CPC classification number: H01L27/3223 , H01L27/3262 , H01L27/3276 , H01L2251/5392
Abstract: A display device includes: a substrate that includes a first area and a second area; a plurality of pixels included in the first area; and a dummy pattern included in the second area, wherein a size of the dummy pattern is smaller than a pixel area corresponding to a first pixel among the plurality of pixels, a ratio of an area occupied by a pixel pattern of the first pixel with respect to the pixel area is a first value, a ratio of an area occupied by the dummy pattern with respect to a dummy area is a second value that is greater than the first value, and the dummy area and the pixel area have the same size as each other.
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公开(公告)号：US10074706B2
公开(公告)日：2018-09-11
申请号：US15484427
申请日：2017-04-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Wang Woo Lee , Young Woo Park , Se Wan Son , Min Woo Woo
CPC classification number: H01L27/3258 , G09G3/3208 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/3241 , H01L27/3246 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L27/3274 , H01L27/3276 , H01L2227/323
Abstract: An organic light emitting diode display includes a substrate, a semiconductor disposed on the substrate that includes a channel for each of a plurality of transistors and doping regions formed at both sides of each channel; a gate insulating layer disposed on the semiconductor that includes an insulating layer opening through which the doping regions of two different transistors are exposed; a gate electrode disposed on the gate insulating layer that overlaps each channel; an interlayer insulating layer disposed on the gate electrode that includes a first and second contact holes through which the doping regions exposed within the insulating layer opening are each exposed; and data wirings disposed on the interlayer insulating layer that are each connected to the doping regions. The interlayer insulating layer includes an organic layer, and the first and second contact holes each include a first side wall positioned within the insulating layer opening.
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Patent Agency Ranking
公开(公告)号：US09620574B2
公开(公告)日：2017-04-11
申请号：US14966127
申请日：2015-12-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Wang Woo Lee , Young Woo Park , Se Wan Son , Min Woo Woo
IPC: H01L27/32 , G09G3/3208 , H01L27/12
CPC classification number: H01L27/3258 , G09G3/3208 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/3241 , H01L27/3246 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L27/3274 , H01L27/3276 , H01L2227/323
Abstract: An organic light emitting diode display includes a substrate, a semiconductor disposed on the substrate that includes a channel for each of a plurality of transistors and doping regions formed at both sides of each channel; a gate insulating layer disposed on the semiconductor that includes an insulating layer opening through which the doping regions of two different transistors are exposed; a gate electrode disposed on the gate insulating layer that overlaps each channel; an interlayer insulating layer disposed on the gate electrode that includes a first and second contact holes through which the doping regions exposed within the insulating layer opening are each exposed; and data wirings disposed on the interlayer insulating layer that are each connected to the doping regions. The interlayer insulating layer includes an organic layer, and the first and second contact holes each include a first side wall positioned within the insulating layer opening.
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公开(公告)号：US12279478B2
公开(公告)日：2025-04-15
申请号：US17572779
申请日：2022-01-11
Applicant: Samsung Display Co., LTD.
Inventor： Jin Seock Ma , Moo Soon Ko , Se Wan Son , Jin Goo Jung , Kyung Hyun Choi
Abstract: A display device includes a substrate that includes a display area and a transmissive area, a first blocking layer that is disposed on the display area of the substrate, and disposed on a first surface of the substrate, a second blocking layer that is disposed in the display area of the substrate, and disposed on a second surface of the substrate opposite to the first surface, an insulation layer that is disposed on the first blocking layer, a transistor that is disposed on the insulation layer, and a light emitting element that is connected to the transistor.
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公开(公告)号：US11594588B2
公开(公告)日：2023-02-28
申请号：US17106230
申请日：2020-11-30
Applicant: Samsung Display Co., Ltd.
Inventor： Se Wan Son , Moo Soon Ko , Jin Sung An , Jin Seok Oh , Min Woo Woo , Seong Jun Lee , Wang Woo Lee , Ji Seon Lee
Abstract: Provided is a display device. The display device comprises a first active layer disposed on a substrate and made of a first material, a second active layer disposed on the first active layer and made of a second material different from the first material, a first gate layer disposed on the second active layer, and an inorganic pattern disposed below the second active layer and overlapping a portion of the first gate layer. The second active layer includes a conductor portion disposed between a portion of the first gate layer and the inorganic pattern.
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公开(公告)号：US11580916B2
公开(公告)日：2023-02-14
申请号：US17680964
申请日：2022-02-25
Applicant: Samsung Display Co., Ltd.
Inventor： Ji Seon Lee , Jin Sung An , Seok Je Seong , Seong Jun Lee , Se Wan Son
IPC: G09G3/3291 , H01L27/32 , H01L27/12
Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.
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30.发明授权公开(公告)号：US11552150B2
公开(公告)日：2023-01-10
申请号：US17116922
申请日：2020-12-09
Applicant: Samsung Display Co., Ltd.
Inventor： Se Wan Son , Moo Soon Ko , Rae Young Gwak , Jin Seock Ma , Min Jeong Park , Ki Bok Yoo , So La Lee , Jin Goo Jung , Jong Won Chae , Ye Ji Han
Abstract: A display device includes: a first substrate including a pixel area and a transmissive area; a thin-film transistor on the first substrate; a planarization layer on the thin-film transistor; a first light emitting electrode on the planarization layer; a bank covering a part of the first light emitting electrode; a light emitting layer on the first light emitting electrode; and a second light emitting electrode on the light emitting layer and the bank. The transmissive area includes a transmissive hole penetrating the bank and the planarization layer.
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