公开(公告)号：US20210305190A1

公开(公告)日：2021-09-30

申请号：US17146550

申请日：2021-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jimin Choi ,  Jung-Hoon Han ,  Yeonjin Lee ,  Jong-Min Lee ,  Jihoon Chang

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L21/66

Abstract: Semiconductor packages may include a semiconductor chip on a substrate and an under-fill layer between the semiconductor chip and the substrate. The semiconductor chip may include a semiconductor substrate including first and second regions, and an interlayer dielectric layer that may cover the semiconductor substrate and may include connection lines. First conductive pads may be on the first region and may be electrically connected to some of the connection lines. Second conductive pads may be on the second region and may be electrically isolated from all of the connection lines. The semiconductor chip may also include a passivation layer that may cover the interlayer dielectric layer and may include holes that may expose the first and second conductive pads, respectively. On the second region, the under-fill layer may include a portion that may be in one of the first holes and contact one of the second conductive pads.

公开(公告)号：US10796950B2

公开(公告)日：2020-10-06

申请号：US16238172

申请日：2019-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeong-Dong Lee ,  Keunnam Kim ,  Dongryul Lee ,  Minseong Choi ,  Jimin Choi ,  Yong Kwan Kim ,  Changhyun Cho ,  Yoosang Hwang

IPC: H01L21/76 ,  H01L21/768 ,  H01L27/108 ,  H01L23/532 ,  H01L23/535

Abstract: According to some embodiments, a semiconductor device may include gate structures on a substrate; first and second impurity regions formed in the substrate and at both sides of each of the gate structures; conductive line structures provided to cross the gate structures and connected to the first impurity regions; and contact plugs connected to the second impurity regions, respectively. For each of the conductive line structures, the semiconductor device may include a first air spacer provided on a sidewall of the conductive line structure; a first material spacer provided between the conductive line structure and the first air spacer; and an insulating pattern provided on the air spacer. The insulating pattern may include a first portion and a second portion, and the second portion may have a depth greater than that of the first portion and defines a top surface of the air spacer.