公开(公告)号：US11204765B1

公开(公告)日：2021-12-21

申请号：US17003600

申请日：2020-08-26

Applicant: QUALCOMM Incorporated

Inventor： Yun Du ,  Fei Wei ,  Gang Zhong ,  Minjie Huang ,  Jian Jiang ,  Zilin Ying ,  Baoguang Yang ,  Yang Xia ,  Jing Han ,  Liangxiao Hu ,  Chihong Zhang ,  Chun Yu ,  Andrew Evan Gruber ,  Eric Demers

IPC: G06F9/30 ,  G06F9/38 ,  G06T1/20 ,  G06F9/50

Abstract: A graphics processing unit (GPU) utilizes block general purpose registers (bGPRs) to load multiple waves of samples for an instruction group into a processing pipeline and receive processed samples from the pipeline. The GPU acquires a credit for the bGPR for execution of the instruction group for a first wave using a persistent GPR and the bGPR. The GPU refunds the credit upon loading the first wave into the pipeline. The GPU executes a subsequent wave for the instruction group to load samples to the pipeline when at least one credit is available and the pipeline is processing the first wave. The GPU stores an indication of each wave that has been loaded into the pipeline in a queue. The GPU returns samples for a next wave in the queue from the pipeline to the bGPR for further processing when the physical slot of the bGPR is available.

公开(公告)号：US11132760B2

公开(公告)日：2021-09-28

申请号：US16714052

申请日：2019-12-13

Applicant: QUALCOMM Incorporated

Inventor： Yun Du ,  Andrew Evan Gruber ,  Chihong Zhang ,  Gang Zhong ,  Jian Jiang ,  Fei Wei ,  Minjie Huang ,  Zilin Ying ,  Yang Xia ,  Jing Han ,  Chun Yu ,  Eric Demers

IPC: G06T1/20 ,  G06F9/30 ,  G06F9/50 ,  G06F9/38 ,  G06F1/03

Abstract: Methods, systems, and devices for graphic processing are described. The methods, systems, and devices may include or be associated with identifying a graphics instruction, determining that the graphics instruction is alias enabled for the device, partitioning an alias lookup table into one or more slots, allocating a slot of the alias lookup table based on the partitioning and determining that the graphics instruction is alias enabled, generating an alias instruction based on allocating the slot of the alias lookup table and determining that the graphics instruction is alias enabled, and processing the alias instruction.

公开(公告)号：US11094103B2

公开(公告)日：2021-08-17

申请号：US16364829

申请日：2019-03-26

Applicant: QUALCOMM Incorporated

Inventor： Yun Du ,  Andrew Evan Gruber ,  Chun Yu ,  Chihong Zhang ,  Hongjiang Shang ,  Zilin Ying ,  Fei Wei

IPC: G06T15/04 ,  G06F9/54 ,  G06F9/38

Abstract: Example techniques are described for generating graphics content by obtaining texture operation instructions corresponding to a texture operation, in response to determining at least one of insufficient general purpose register space is available for the texture operation or insufficient wave slots are available for the texture operation, generating an indication that the texture operation corresponds to a deferred wave, executing the texture operation, sending, to a texture processor, initial texture sample instructions corresponding to the texture operation that was executed, and receiving texture mapped data corresponding to the initial texture sample instructions.

公开(公告)号：US09665370B2

公开(公告)日：2017-05-30

申请号：US14462932

申请日：2014-08-19

Applicant: QUALCOMM Incorporated

Inventor： Yun Du ,  Lin Chen ,  Andrew Evan Gruber ,  Chihong Zhang ,  Chun Yu

IPC: G06T15/00 ,  G06F9/30 ,  G06T1/20 ,  G06F9/38 ,  G06F9/45

CPC classification number: G06F9/30098 ,  G06F8/441 ,  G06F9/30145 ,  G06F9/30181 ,  G06F9/3828 ,  G06F9/3859 ,  G06T1/20 ,  G06T2200/28

Abstract: Techniques are described in which an indication is included to indicate a last use of an intermediate value generated as part of determining a final value is not be stored in a general purpose register (GPR). A processing unit avoids storing the intermediate value in the GPR based on the indication because the intermediate value is no longer needed for determining the final value.