Abstract:
An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a reference layer (RL) and an enhancement layer, the RL comprising an RL picture having an output region that includes a portion of the RL picture. The processor is configured to determine whether a condition indicates that information outside of the output region is available to predict a current block in the enhancement layer. The processor may encode or decode the video information.
Abstract:
A device decodes, from a scalable nesting supplemental enhancement information (SEI) message in an encoded video bitstream, a plurality of syntax elements that identify a plurality of operation points to which a nested SEI message encapsulated by the scalable nesting SEI message applies. Furthermore, the device uses one or more syntax elements of the nested SEI message to perform an operation regarding any of the operation points to which the nested SEI message applies.
Abstract:
During a coding process, systems, methods, and apparatus may code information indicating whether gradual decoder refresh (GDR) of a picture is enabled. When GDR is enabled, the coding process, systems, methods, and apparatus may code information that indicates whether one or more slices of the picture belong to a foreground region of the picture. In another example, during a coding process, systems, methods, and apparatus may decode video data corresponding to an ISP identification (ISP ID) for one of the ISPs for slices of a picture. The systems, methods, and apparatus may decode video data corresponding to an ROI using the ISP.
Abstract:
A video encoder signals, in a slice header for a current slice of a current picture, a first long-term reference picture (LTRP) entry, the first LTRP entry indicating that a particular reference picture is in a long-term reference picture set of the current picture. Furthermore, the video encoder signals, in the slice header, a second LTRP entry only if second LTRP entry does not indicate that the particular reference picture is in the long-term reference picture set of the current picture.
Abstract:
This disclosure describes techniques that may enable a video coder to simultaneously implement multiple parallel processing mechanisms, including two or more of wavefront parallel processing (WPP), tiles, and entropy slices. This disclosure describes signaling techniques that are compatible both with coding standards that only allow one parallel processing mechanism to be implemented at a time, but that are also compatible with potential future coding standards that may allow for more than one parallel processing mechanism to be implemented simultaneously. This disclosure also describes restrictions that may enable WPP and tiles to be implemented simultaneously.
Abstract:
An example method of decoding video data includes determining a header parameter set that includes one or more syntax elements specified individually by each of one or more slice headers, the header parameter set being associated with a header parameter set identifier (HPS ID), and determining one or more slice headers that reference the header parameter set to inherit at least one of the syntax elements included in the header parameter set, where the slice headers are each associated with a slice of the encoded video data, and where the slice headers each reference the header parameter set using the HPS ID.
Abstract:
Techniques of this disclosure provide an indication of whether performing random access from a particular access unit in a bitstream requires fetching of parameter sets from previous access units. A clean random access (CRA) picture can be positioned at any point within a coded video sequence and does not clean a decoded picture buffer (DPB) of a video decoder. In order to perform random access decoding from the CRA picture, a video decoder may need to fetch one or more parameter sets included in unavailable access units that precede the CRA picture. The techniques provide an indication, for each CRA picture, that indicates whether parameter sets included in previous access units are needed to perform random access from the picture. When no parameter sets from previous access units are needed for random access from a particular CRA picture, a video decoder may determine to perform random access from that picture.
Abstract:
In one example, a device for decoding video data includes a video decoder configured to decode one or more syntax elements of a current reference picture set (RPS) prediction data structure, wherein at least one of the syntax elements represents a picture order count (POC) difference between a POC value associated with the current RPS and a POC value associated with a previously decoded RPS, form a current RPS based at least in part on the RPS prediction data structure and the previously decoded RPS, and decode one or more pictures using the current RPS. A video encoder may be configured to perform a substantially similar process during video encoding.
Abstract:
In one example, a device includes a video coder configured to code a picture order count (POC) value for a first picture of video data, code a second-dimension picture identifier for the first picture, and code, in accordance with a base video coding specification or an extension to the base video coding specification, a second picture based at least in part on the POC value and the second-dimension picture identifier of the first picture. The video coder may comprise a video encoder or a video decoder. The second-dimension picture identifier may comprise, for example, a view identifier, a view order index, a layer identifier, or other such identifier. The video coder may code the POC value and the second-dimension picture identifier during coding of a motion vector for a block of the second picture, e.g., during advanced motion vector prediction or merge mode coding.
Abstract:
An apparatus for coding video information according to certain aspects includes a memory unit configured to store video information associated with a plurality of layers and a processor. The processor is configured to obtain information associated with a current access unit (AU) to be coded, the current AU containing pictures from one or more layers of the plurality of layers. The processor is also configured to reset a picture order count (POC) of a layer included in the current AU via (1) resetting only a most significant bit (MSB) of the POC or (2) resetting both the MSB of the POC and a least significant (LSB) of the POC. The processor is further configured to, for pictures in one or more Ails subsequent to the current AU in decoding order: set a value of a first flag indicative whether a reset of the POC is a full reset.