DIGITAL SIGNAL GENERATOR FOR AUDIO ARTEFACT REDUCTION

    公开(公告)号:US20220123696A1

    公开(公告)日:2022-04-21

    申请号:US17459050

    申请日:2021-08-27

    Applicant: NXP B.V.

    Abstract: A digital signal generator apparatus and method is described. The digital signal generator includes a counter, an integrator and a comparator. The counter counts up or down from an initial counter value dependent on a counter control input. The comparator has a first input coupled to the counter output, a threshold input and a comparator output coupled to the counter control input. The integrator has an input coupled to the counter output and an output coupled to the digital signal generator output. The digital signal generator determines the count direction after the initial direction dependent on the comparison between a threshold value applied to the threshold input and the counter output value. The digital signal generator may implement the generation of a waveform having an approximation to a raised cosine function. The generated waveform may be used for audio artefact reduction in an audio amplifier during mute or unmute operations or during power up power down operations.

    Resistor ladder digital-to-analog converter with mismatch correction and method therefor

    公开(公告)号:US10014873B1

    公开(公告)日:2018-07-03

    申请号:US15714230

    申请日:2017-09-25

    Applicant: NXP B.V.

    CPC classification number: H03M1/0604 H03M1/066 H03M1/765 H03M1/785

    Abstract: A digital-to-analog converter (DAC) includes a plurality of resistive elements connected together in series to form a ring of resistive elements. A node is formed by each of the connections of adjacent resistive elements of the ring. Groups of parallel-connected switches are coupled to each node. A first switch of the group of switches is for selectively coupling a first power supply voltage terminal to the node. A second switch of the group of switches is for selectively coupling a second power supply voltage to the node. A third switch of the group of switches is for selectively coupling an output terminal to the node. A differential or single-ended analog output may be provided. Mismatch induced error is removed using a mismatch error shaping technique that shapes the errors outside a pass-band.

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