公开(公告)号：US20210043731A1

公开(公告)日：2021-02-11

申请号：US16986436

申请日：2020-08-06

Applicant: Micron Technology, Inc.

Inventor： Manuj Nahar ,  Vassil N. Antonov ,  Kamal M. Karda ,  Michael Mutch ,  Hung-Wei Liu ,  Jeffery B. Hull

IPC: H01L29/08 ,  H01L29/04 ,  H01L29/06 ,  H01L29/78 ,  H01L21/02 ,  H01L29/66

Abstract: A transistor comprises a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region. The channel region is crystalline and comprises a plurality of vertically-elongated crystal grains that individually are directly against both of the top source/drain region and the bottom source/drain region. Other embodiments, including methods, are disclosed.

公开(公告)号：US10553673B2

公开(公告)日：2020-02-04

申请号：US15855665

申请日：2017-12-27

Applicant: Micron Technology, Inc.

Inventor： Manuj Nahar ,  Vassil N. Antonov

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/34 ,  C23C16/40 ,  C23C16/455 ,  H01L27/108 ,  B82Y99/00 ,  H01L49/02

Abstract: A method used in forming at least a portion of at least one conductive capacitor electrode of a capacitor that comprises a pair of conductive capacitor electrodes having a capacitor insulator there-between comprises forming an insulative first material comprising an amorphous insulative metal oxide. The amorphous insulative metal oxide is reduced in a reducing-ambient to form a conductive second material from the insulative first material. Such reducing in the reducing-ambient both (a) removes oxygen from and changes the stoichiometry of the metal oxide, and (b) crystallizes the metal oxide into a crystalline state that is conductive.

公开(公告)号：US09887083B2

公开(公告)日：2018-02-06

申请号：US14877677

申请日：2015-10-07

Applicant: Micron Technology, Inc.

Inventor： Vassil N. Antonov ,  Vishwanath Bhat

IPC: H01G4/00 ,  H01G5/00 ,  H01G7/00 ,  H01G9/00 ,  H01G13/00 ,  C23F1/00 ,  C23F3/00 ,  H01L21/02 ,  H01L21/3105 ,  H01L49/02

CPC classification number: H01L21/02356 ,  H01L21/02175 ,  H01L21/02186 ,  H01L21/3105 ,  H01L28/65

Abstract: A method of forming a capacitor includes depositing a dielectric metal oxide layer of a first phase to a thickness no greater than 75 Angstroms over an inner conductive capacitor electrode material. The first phase dielectric metal oxide layer has a k of at least 15. Conductive RuO2 is deposited over and into physical contact with the dielectric metal oxide layer. Then, the RuO2 and the dielectric metal oxide layer are annealed at a temperature below 500° C. The RuO2 in physical contact with the dielectric metal oxide during the annealing facilitates a change of the dielectric metal oxide layer from the first phase to a second crystalline phase having a higher k than the first phase. The annealed dielectric metal oxide layer is incorporated into a capacitor dielectric region of a capacitor construction. Other implementations are disclosed.

公开(公告)号：US20150194478A1

公开(公告)日：2015-07-09

申请号：US14147424

申请日：2014-01-03

Applicant: Micron Technology, Inc.

Inventor： Vassil N. Antonov ,  Vishwanath Bhat

IPC: H01L49/02

CPC classification number: H01L28/84 ,  H01L28/91

Abstract: A method of forming a capacitor includes forming an elevationally elongated and elevationally inner capacitor electrode that comprises different composition laterally-outermost and laterally-innermost conductive portions that have different respective intrinsic residual mechanical stress. The innermost conductive portion is formed to have greater mechanical stress in the compressive direction than the outermost conductive portion. A capacitor dielectric is formed over the inner capacitor electrode and an elevationally outer capacitor electrode is formed over the capacitor dielectric. A capacitor construction independent of the method formed is disclosed.

Abstract translation: 形成电容器的方法包括形成具有不同组成的横向最外侧和最外层的导电部分的具有不同的各自的本征残余机械应力的不规则的细长的和垂直内部的电容器电极。 最内侧的导电部形成为具有比最外侧导电部更大的压缩方向的机械应力。 在内部电容器电极上形成电容器电介质，并且在电容器电介质上方形成正面外部的电容器电极。 公开了独立于所形成方法的电容器结构。

公开(公告)号：US20150054127A1

公开(公告)日：2015-02-26

申请号：US14501423

申请日：2014-09-30

Applicant: Micron Technology, Inc.

Inventor： Joseph Neil Greeley ,  Duane M. Goodner ,  Vishwanath Bhat ,  Vassil N. Antonov ,  Prashant Raghu

IPC: H01L49/02

CPC classification number: H01L28/75 ,  B82Y30/00 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/65 ,  H01L28/90 ,  Y10S977/932 ,  Y10T428/265

Abstract: Some embodiments include a method of forming a capacitor. An opening is formed through a silicon-containing mass to a base, and sidewalls of the opening are lined with protective material. A first capacitor electrode is formed within the opening and has sidewalls along the protective material. At least some of the silicon-containing mass is removed with an etch. The protective material protects the first capacitor electrode from being removed by the etch. A second capacitor electrode is formed along the sidewalls of the first capacitor electrode, and is spaced from the first capacitor electrode by capacitor dielectric. Some embodiments include multi-material structures having one or more of aluminum nitride, molybdenum nitride, niobium nitride, niobium oxide, silicon dioxide, tantalum nitride and tantalum oxide. Some embodiments include semiconductor constructions.

Abstract translation: 一些实施例包括形成电容器的方法。 通过含硅物质向基底形成开口，并且开口的侧壁衬有保护材料。 第一电容器电极形成在开口内并具有保护材料的侧壁。 用蚀刻去除至少一些含硅物质。 保护材料保护第一电容器电极不被蚀刻除去。 沿着第一电容器电极的侧壁形成第二电容器电极，并且通过电容器电介质与第一电容器电极间隔开。 一些实施例包括具有氮化铝，氮化钼，氮化铌，氧化铌，二氧化硅，氮化钽和氧化钽中的一种或多种的多材料结构。 一些实施例包括半导体结构。