PHASE LOCK LOOP
    21.
    发明申请
    PHASE LOCK LOOP 有权
    相位锁定

    公开(公告)号:US20170063385A1

    公开(公告)日:2017-03-02

    申请号:US15133369

    申请日:2016-04-20

    Applicant: MEDIATEK Inc.

    CPC classification number: H03L7/093 H03L7/085 H03L7/099 H03L7/197

    Abstract: A PLL includes a phase frequency detector (PFD), a charge pump, a capacitor coupled to the charge pump, an analog-to-digital convertor (ADC), a noise canceller, an accumulator, a loop filter, an oscillator, a digital block and a frequency divider. The PFD detects a phase difference between a reference signal and a divided signal. The charge pump generates a charge pump signal in response to the phase difference. The ADC converts the charge pump signal to a first digital signal, and quantizes it to a second digital signal. The noise canceller forms a shaped noise signal according to the first and second digital signals, and eliminates the shaped noise signal at the output of the noise canceller to generate a noise cancelled signal. The accumulator accumulates the noise cancelled signal. The loop filter filters the accumulated signal. The oscillator provides an output oscillating signal in response to the filtered signal.

    Abstract translation: PLL包括相位频率检测器(PFD),电荷泵,耦合到电荷泵的电容器,模拟 - 数字转换器(ADC),噪声消除器,累加器,环路滤波器,振荡器,数字 块和分频器。 PFD检测参考信号和分频信号之间的相位差。 电荷泵响应于相位差产生电荷泵信号。 ADC将电荷泵信号转换为第一数字信号,并将其量化为第二数字信号。 噪声消除器根据第一和第二数字信号形成成形噪声信号,并且消除噪声消除器的输出处的成形噪声信号以产生噪声消除信号。 累加器累加噪声消除信号。 环路滤波器对累积信号进行滤波。 振荡器响应于滤波信号提供输出振荡信号。

    Current controlling device and signal converting apparatus applying the current controlling device
    22.
    发明授权
    Current controlling device and signal converting apparatus applying the current controlling device 有权
    电流控制装置和应用电流控制装置的信号转换装置

    公开(公告)号:US09503038B2

    公开(公告)日:2016-11-22

    申请号:US14541113

    申请日:2014-11-13

    Applicant: MEDIATEK INC.

    Abstract: A current controlling device includes: a first resistive circuit arranged to selectively conduct a first current to a first output terminal from a first input terminal; and a second resistive circuit arranged to selectively conduct a second current to a second output terminal from the first input terminal; wherein when the first resistive circuit conducts the first current to the first output terminal and when the second resistive circuit does not conduct the second current to the second output terminal, the first input terminal has a first input impedance; when the first resistive circuit does not conduct the first current to the first output terminal and when the second resistive circuit conducts the second current to the second output terminal, the first input terminal has a second input impedance substantially equal to the first input impedance.

    Abstract translation: 电流控制装置包括:第一电阻电路,布置成选择性地将第一电流从第一输入端子传导到第一输出端子; 以及第二电阻电路,布置成从第一输入端子选择性地将第二电流传导到第二输出端子; 其中当所述第一电阻电路将所述第一电流传导到所述第一输出端时,并且当所述第二电阻电路不将所述第二电流传导到所述第二输出端时,所述第一输入端具有第一输入阻抗; 当第一电阻电路不向第一输出端子传导第一电流,并且当第二电阻电路将第二电流传导到第二输出端时,第一输入端具有基本上等于第一输入阻抗的第二输入阻抗。

    Signal modulating device capable of reducing peaking in signal transfer function
    23.
    发明授权
    Signal modulating device capable of reducing peaking in signal transfer function 有权
    信号调制装置能够减少信号传递功能的峰值

    公开(公告)号:US09312879B2

    公开(公告)日:2016-04-12

    申请号:US14600017

    申请日:2015-01-20

    Applicant: MEDIATEK INC.

    CPC classification number: H03M3/354 H03H11/1252 H03M3/404 H03M3/438

    Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.

    Abstract translation: 信号调制装置包括:积分电路,被配置为根据缩放的模拟信号和第一反馈信号产生积分信号; 谐振电路,被布置成根据积分信号产生谐振信号; 布置成将所述谐振信号转换为数字输出信号的第一信号转换电路; 布置成将数字输出信号转换成第一反馈信号的第二信号转换电路; 以及第一阻抗电路,其具有接收模拟信号的第一端子和耦合到所述谐振电路的第二端子,用于改变所述前向路径传递函数中的零点的位置,并因此整形所述信号调制装置的信号传递函数(STF) ; 以及第二阻抗电路,其具有接收模拟信号的第一端子和耦合到积分电路的第二端子,用于产生经缩放的模拟信号。

    Low pass filter with common-mode noise reduction
    24.
    发明授权
    Low pass filter with common-mode noise reduction 有权
    具有共模降噪功能的低通滤波器

    公开(公告)号:US09263993B2

    公开(公告)日:2016-02-16

    申请号:US14259120

    申请日:2014-04-22

    Applicant: MEDIATEK INC.

    Abstract: A low pass filter includes a first amplifier stage and a second amplifier stage. The first amplifier stage includes a differential operational amplifier, wherein the first amplifier stage is arranged to process a differential input signal to generate a differential intermediate signal, the differential input signal having a first input signal and a second input signal, and the differential intermediate signal having a first intermediate signal and a second intermediate signal. The second amplifier stage has no common-mode feedback and is arranged to process the differential intermediate signal to generate a differential output signal, wherein the differential output signal has a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal. Since the noisy common-mode feedback is removed from the second amplifier stage, the overall common-mode noise of the low pass filter can be decreased.

    Abstract translation: 低通滤波器包括第一放大级和第二放大级。 第一放大器级包括差分运算放大器,其中第一放大器级被布置成处理差分输入信号以产生差分中间信号,差分输入信号具有第一输入信号和第二输入信号,以及差分中间信号 具有第一中间信号和第二中间信号。 第二放大器级没有共模反馈,并且被布置成处理差分中间信号以产生差分输出信号,其中差分输出信号具有对应于第一输入信号的第一输出信号和对应于第一输入信号的第二输出信号 第二输入信号。 由于从第二放大器级除去噪声共模反馈,所以可以降低低通滤波器的总体共模噪声。

Patent Agency Ranking