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    On-chip multi-layer transformer and inductor
    22.
    发明授权
    On-chip multi-layer transformer and inductor 有权

    公开(公告)号：US11694836B2

    公开(公告)日：2023-07-04

    申请号：US16958049

    申请日：2018-03-30

    Applicant: Intel Corporation

    Inventor： Chuanzhao Yu ,  Qiang Li ,  David Newman

    IPC: H01F27/28 ,  H01F41/04

    CPC classification number: H01F27/2804 ,  H01F41/041 ,  H01F2027/2809

    Abstract: A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire components in parallel spaced relation extending around the center axis and the first wire component is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire component of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.

    Method and apparatus of game status determination
    24.
    发明授权
    Method and apparatus of game status determination 有权

    公开(公告)号：US11514704B2

    公开(公告)日：2022-11-29

    申请号：US17057020

    申请日：2018-10-02

    Applicant: Intel Corporation

    Inventor： Chen Ling ,  Ming Lu ,  Qiang Li ,  Wenlong Li ,  Xiaofeng Tong ,  Yikai Fang ,  Yumeng Wang

    IPC: G06K9/00 ,  G06V40/10 ,  G06V20/40 ,  G06V40/20

    Abstract: A video capture and processing system includes a memory configured to store a pose database. The pose database includes poses that indicate a start or stoppage in an event. The system also includes a processor operatively coupled to the memory. The processor is configured to generate a pose of an individual in a video frame of captured video of the event. The pose can be three-dimensional pose or a two-dimensional pose. The processor is also configured to determine, based on the pose database, whether the pose of the individual indicates a start or a stoppage in the event. The processor is further configured to control an upload of video of the event based on the determination of whether the pose indicates the start or the stoppage in the event.

    Avatar animation system
    26.
    发明授权
    Avatar animation system 有权

    公开(公告)号：US10475225B2

    公开(公告)日：2019-11-12

    申请号：US15124811

    申请日：2015-12-18

    Applicant: INTEL CORPORATION

    Inventor： Minje Park ,  Tae-Hoon Kim ,  Myung-Ho Ju ,  Jihyeon Yi ,  Xiaolu Shen ,  Lidan Zhang ,  Qiang Li

    IPC: G06T13/40 ,  G06T7/73 ,  G06T17/20

    Abstract: Avatar animation systems disclosed herein provide high quality, real-time avatar animation that is based on the varying countenance of a human face. In some example embodiments, the real-time provision of high quality avatar animation is enabled at least in part, by a multi-frame regressor that is configured to map information descriptive of facial expressions depicted in two or more images to information descriptive of a single avatar blend shape. The two or more images may be temporally sequential images. This multi-frame regressor implements a machine learning component that generates the high quality avatar animation from information descriptive of a subject's face and/or information descriptive of avatar animation frames previously generated by the multi-frame regressor. The machine learning component may be trained using a set of training images that depict human facial expressions and avatar animation authored by professional animators to reflect facial expressions depicted in the set of training images.

    Video codec and motion estimation method
    28.
    发明授权
    Video codec and motion estimation method 有权

    公开(公告)号：US09961354B2

    公开(公告)日：2018-05-01

    申请号：US15584572

    申请日：2017-05-02

    Applicant: INTEL CORPORATION

    Inventor： Zhichong Chen ,  Jinfeng Zhou ,  Jianbin He ,  Liu Yang ,  Qiang Li

    IPC: H04N19/433 ,  H04N19/51

    CPC classification number: H04N19/433 ,  H04N19/51

    Abstract: The invention provides a video codec. In one embodiment, the video codec is coupled to an outer memory storing a reference frame, and comprises an interface circuit, an in-chip memory, a motion estimation circuit, and a controller. The interface circuit obtains in-chip data from the reference frame stored in the outer memory. The in-chip memory stores the in-chip data. The motion estimation circuit retrieves search window data from the in-chip data with a search window, and performs a motion estimation process on a current macroblock according to the search-window data. The controller shifts the location of the search window when the current macroblock is shifted, marks a macroblock shifted out from the search window as an empty macroblock, and controls the interface circuit to obtain an updated macroblock for replacing the empty macroblock in the in-chip memory from the reference frame stored in the outer memory.

    Electronic device and motion compensation method
    29.
    发明授权
    Electronic device and motion compensation method 有权

    公开(公告)号：US09918079B2

    公开(公告)日：2018-03-13

    申请号：US13888635

    申请日：2013-05-07

    Applicant: Intel Corporation

    Inventor： Yinglai Xi ,  Qiang Li ,  Zhichong Chen ,  Jumei Li

    IPC: H04N19/43 ,  H04N19/105 ,  H04N19/44 ,  H04N19/80 ,  H04N19/523

    CPC classification number: H04N19/43 ,  H04N19/44 ,  H04N19/523 ,  H04N19/80

    Abstract: An electronic device for motion compensation is provided. The electronic device has a processing unit configured to perform a decoding program on a video bitstream to output decoding data, wherein the decoding data has a plurality of inter-prediction macroblocks, and the processing unit further generates a plurality of first pixel interpolation values according to the inter-prediction macroblocks which are smaller than a predetermined macroblock size. A motion compensation acceleration circuit is configured to generate a plurality of second pixel interpolation values according to the inter-prediction macroblocks which are larger than or equal to the predetermined macroblocks size, and generate a plurality of reconstructed macroblocks according to the first pixel interpolation values, the second pixel interpolation values, and a plurality of corresponding residue values.

    Avatar facial expression animations with head rotation
    30.
    发明授权
    Avatar facial expression animations with head rotation 有权

    公开(公告)号：US09761032B2

    公开(公告)日：2017-09-12

    申请号：US14443339

    申请日：2014-07-25

    Applicant: Intel Corporation

    Inventor： Xiaofeng Tong ,  Qiang Li ,  Thomas Sachson ,  Wenlong Li

    IPC: G06T13/40 ,  G06F3/01 ,  G06K9/00 ,  G06T15/04 ,  G06T15/50

    CPC classification number: G06T13/40 ,  A63F2300/5553 ,  A63F2300/6607 ,  G06F3/012 ,  G06K9/00228 ,  G06K9/00281 ,  G06T15/04 ,  G06T15/503

    Abstract: Apparatuses, methods and storage medium associated with animating and rendering an avatar are disclosed herein. In embodiments, In embodiments, an apparatus may include an avatar animation engine configured to receive a plurality of facial motion parameters and a plurality of head gestures parameters, respectively associated with a face and a head of a user. The plurality of facial motion parameters may depict facial action movements of the face, and the plurality of head gesture parameters may depict head pose gestures of the head. Further, the avatar animation engine may be configured to drive an avatar model with facial and skeleton animations to animate an avatar, using the facial motion parameters and the head gestures parameters, to replicate a facial expression of the user on the avatar that includes impact of head post rotation of the user. Other embodiments may be described and/or claimed.

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