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公开(公告)号：US20240275574A1
公开(公告)日：2024-08-15
申请号：US18649513
申请日：2024-04-29
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He , Xinyuan Wang , Hao Ren
CPC classification number: H04L7/02 , H04L1/0041 , H04L1/0071
Abstract: This application discloses a data transmission method, apparatus, device, and system. The data transmission method includes: A first module obtains at least one channel of first data encoded based on first FEC; converts the at least one channel of first data to obtain at least one channel of second data, where a sum of rates of the at least one channel of second data is not less than a sum of rates of the at least one channel of first data; and transmits the obtained at least one channel of second data. In the method, the at least one channel of first data is converted to obtain the at least one channel of second data whose sum of rates is not less than the sum of rates of the at least one channel of first data.
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公开(公告)号：US20240056218A1
公开(公告)日：2024-02-15
申请号：US18494427
申请日：2023-10-25
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: H04L1/0057 , H03M5/145 , H04L1/0045
Abstract: This application relates to a codeword synchronization method, a chip, a network device, and a system. The codeword synchronization method includes: receiving a first data sequence, where the first data sequence includes a plurality of bits, and a codeword in the first data sequence includes extension information for verifying the codeword; selecting at least one group of bits from the plurality of bits as the extension information to perform verification, and determining a candidate bit in the plurality of bits based on a result of the verification; and determining a synchronization position based on the candidate bit, where the synchronization position indicates a start position of the codeword that is in the first data sequence.
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公开(公告)号：US11824636B2
公开(公告)日：2023-11-21
申请号：US17833862
申请日：2022-06-06
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xiang He , Yunlei Qi , Jingfeng Chen , Tao Lin , Junmin Song , Xinyuan Wang
IPC: H04J3/06 , H03M9/00 , H04J3/16 , H04L69/323
CPC classification number: H04J3/0667 , H03M9/00 , H04J3/0632 , H04J3/0688 , H04J3/1658 , H04L69/323
Abstract: This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.
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公开(公告)号：US20230138058A1
公开(公告)日：2023-05-04
申请号：US18146634
申请日：2022-12-27
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He , Yunlei Qi , Jingfeng Chen , Tao Lin , Junmin Song , Xinyuan Wang
IPC: H04J3/06
Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
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Patent Agency Ranking
公开(公告)号：US20230023776A1
公开(公告)日：2023-01-26
申请号：US17961000
申请日：2022-10-06
Applicant: Huawei Technologies Co., Ltd.
Inventor： Hao Ren , Xiang He , Xinyuan Wang
Abstract: A codeword synchronization method includes determining a candidate in a plurality of bits of a data sequence received by a receive end, and determining a synchronization position based on the candidate bit, where the synchronization position indicates a start position of a codeword in the data sequence.
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公开(公告)号：US11552721B2
公开(公告)日：2023-01-10
申请号：US17403131
申请日：2021-08-16
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He , Yunlei Qi , Jingfeng Chen , Tao Lin , Junmin Song , Xinyuan Wang
IPC: H04J3/06
Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
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公开(公告)号：US20220337477A1
公开(公告)日：2022-10-20
申请号：US17831158
申请日：2022-06-02
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He , Hongliang Sun , Dawei Fan
IPC: H04L41/084 , H04L41/0893
Abstract: A first network device determines configuration information of a target flexible Ethernet (FlexE) group that needs to be adjusted, and adjusts the target FlexE group synchronously with a second network device based on the configuration information of the target FlexE group. The second network device communicates with the first network device through a physical layer link in the target FlexE group. The configuration information of the target FlexE group includes a backup FlexE group number and a backup FlexE map of the target FlexE group, and the backup FlexE map includes information about the physical layer link in the target FlexE group. The first network device and the second network device perform synchronous adjustment. In this way, embodiments of this application provide a management solution for losslessly and dynamically adjusting a FlexE group, to avoid impact on a service and implement FlexE group adjustment in various scenarios.
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公开(公告)号：US20220077958A1
公开(公告)日：2022-03-10
申请号：US17525178
申请日：2021-11-12
Applicant: Huawei Technologies Co., Ltd.
Inventor： Xiang He
IPC: H04L1/00
Abstract: In a data transmission method, a first chip receives a first data stream sent by a second chip, where the first data stream is a data stream obtained through encoding by using a first forward error correction (FEC) code type; and the first chip encodes the first data stream at least once, to obtain a second data stream, where the second data stream is a concatenated FEC code stream obtained through encoding by using at least the first FEC code type and a second FEC code type.
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公开(公告)号：US20200244383A1
公开(公告)日：2020-07-30
申请号：US16847258
申请日：2020-04-13
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xiang He , Yunlei Qi , Jingfeng Chen , Tao Lin , Junmin Song , Xinyuan Wang
Abstract: This application provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.
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