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    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    21.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080116914A1

    公开(公告)日：2008-05-22

    申请号：US11929806

    申请日：2007-10-30

    Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    IPC: G01R1/073

    CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    22.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080111569A1

    公开(公告)日：2008-05-15

    申请号：US11929697

    申请日：2007-10-30

    Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    IPC: G01R31/02

    CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    23.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080111568A1

    公开(公告)日：2008-05-15

    申请号：US11929676

    申请日：2007-10-30

    Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    IPC: G01R1/067

    CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    Socket and method for compensating for differing coefficients of thermal expansion
    24.
    发明授权
    Socket and method for compensating for differing coefficients of thermal expansion 有权
    用于补偿不同热膨胀系数的插座和方法

    公开(公告)号：US07303443B1

    公开(公告)日：2007-12-04

    申请号：US11548789

    申请日：2006-10-12

    Applicant: Brian Samuel Beaman ,  Joseph Kuczynski ,  Theron Lee Lewis ,  Amanda Elisa Ennis Mikhail ,  Arvind Kumar Sinha

    Inventor： Brian Samuel Beaman ,  Joseph Kuczynski ,  Theron Lee Lewis ,  Amanda Elisa Ennis Mikhail ,  Arvind Kumar Sinha

    IPC: H01R24/00

    CPC classification number: H01R13/533 ,  H01R12/716 ,  Y10T29/49222

    Abstract: The illustrative embodiments provide a socket, a method for manufacturing the socket, a device, and a method for compensating for a difference in the coefficients of thermal expansion between a socket and a printed circuit board. The socket includes surface mounted contacts and an elongated housing. The elongated housing comprises an aperture, wherein the surface mounted contacts extend from the aperture. At least one plate connects to the elongated housing, wherein the at least one plate has a coefficient of thermal expansion selected to compensate for a difference in coefficients of thermal expansion between the socket and a printed circuit board.

    Abstract translation: 说明性实施例提供插座，用于制造插座的方法，装置和用于补偿插座和印刷电路板之间的热膨胀系数的差异的方法。 插座包括表面安装的触点和细长的外壳。 细长壳体包括孔，其中表面安装的接触件从孔径延伸。 至少一个板连接到细长壳体，其中至少一个板具有选择的热膨胀系数以补偿插座和印刷电路板之间的热膨胀系数差。

    Wafer scale high density probe assembly, apparatus for use thereof and methods of fabrication thereof
    25.
    发明授权
    Wafer scale high density probe assembly, apparatus for use thereof and methods of fabrication thereof 失效
    晶圆级高密度探针组件，其使用装置及其制造方法

    公开(公告)号：US07282945B1

    公开(公告)日：2007-10-16

    申请号：US09254769

    申请日：1997-09-12

    Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Da-Yuan Shih

    Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Da-Yuan Shih

    IPC: G01R31/02

    CPC classification number: G01R1/07342 ,  G01R3/00

    Abstract: A structure useful as a probe for testing electrical interconnections to integrated circuit devices and other electronic components having a substrate with a bond wire elongated electrical conductor extending away from the surface of the substrate. Each of the bond wire elongated electrical conductors has a first end affixed to the surface at an electrical contact location and a multitude of second ends projecting away from the surface. The first end and said second end of bond wire elongated electrical connector has a ball-shaped protuberance positioned thereon and there existsa in the system means for permitting each of the second ends to move about reference positions.The element which contains means for permitting each of the second ends to move about reference positions is a sheet of material having a plurality of through-holes therein through which the second ends project. There is a perforation in each said sheet in the vicinity of said openings.

    Abstract translation: 一种用作测试与集成电路器件和其他电子器件的电气互连的探针的结构，该电子器件具有一个衬底，该衬底具有远离衬底表面延伸的接合线细长电导体。 每个接合线细长电导体具有在电接触位置处固定到表面的第一端和远离表面突出的多个第二端。 接合线细长电连接器的第一端和所述第二端具有定位在其上的球形突起，并且在系统装置中存在用于允许每个第二端围绕参考位置移动。 包含用于允许每个第二端围绕参考位置移动的装置的元件是其中具有多个通孔的材料片，其中第二端突出穿过。 在所述开口附近的每个所述片材上都有穿孔。

    High density cantilevered probe for electronic devices
    27.
    发明授权
    High density cantilevered probe for electronic devices 失效
    用于电子设备的高密度悬臂式探头

    公开(公告)号：US06329827B1

    公开(公告)日：2001-12-11

    申请号：US09208529

    申请日：1998-12-09

    Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih

    Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih

    IPC: G01R1073

    CPC classification number: G01R1/06727 ,  G01R1/06744 ,  G01R1/07342 ,  G01R3/00 ,  H05K3/326 ,  H05K3/4015

    Abstract: Connectors for electronic devices are described. The connector is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.

    Abstract translation: 描述用于电子设备的连接器。 连接器通过将多根电线球焊接在扇形基板表面上的接触位置而形成。 电线被切断留下残留物。 其中具有电导体图案的图案化聚合物片材设置在延伸穿过片材中的孔的短截线上。 电线的端部被压扁以将聚合物片材放置在适当位置。 导线连接到聚合物片上的电导体，该电导体转换成聚合物片上的接触垫。 将第二根线球焊接到聚合物片上的垫上并切割以留下第二个短截线。 聚合物片材被激光切割，使得每个第二短截线自由地独立于其它第二螺柱移动。 第二短截线的端部设置在诸如FC芯片的电子设备的接触位置，以测试电子设备。

    Printed circuit board edge connector
    28.
    发明授权
    Printed circuit board edge connector 有权
    印刷电路板边缘连接器

    公开(公告)号：US08677617B2

    公开(公告)日：2014-03-25

    申请号：US12769259

    申请日：2010-04-28

    Applicant: Brian Samuel Beaman

    Inventor： Brian Samuel Beaman

    IPC: H05K3/40

    CPC classification number: H05K1/117 ,  H01R12/721 ,  H05K3/403 ,  H05K2201/09145 ,  H05K2201/09909 ,  H05K2201/10863 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49156

    Abstract: A printed circuit board assembly and method of assembly is provided for a printed circuit board having a top and bottom surface with at least one edge portion having a rounded surface extending from the top surface to a point below the top surface and at least one electrical contact pad located on the top surface and extending over the edge portion rounded surface to a point below the top surface.

    Abstract translation: 为具有顶表面和底表面的印刷电路板组件和组装方法提供了一种印刷电路板，该印刷电路板具有顶表面和底表面，其中至少一个边缘部分具有从顶表面延伸到顶表面下方的点的圆形表面， 垫位于顶部表面上并且在边缘部分圆形表面上延伸到顶部表面下方的点。

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    29.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开
    高密度集成电路设备，测试探针及其使用方法

    公开(公告)号：US20100045321A1

    公开(公告)日：2010-02-25

    申请号：US12548580

    申请日：2009-08-27

    Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

    IPC: G01R31/02 ,  G01R1/06

    CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    Abstract translation: 本发明涉及一种高密度测试探针，其提供用于测试晶片形式的高密度和高性能集成电路或作为离散芯片的装置。 测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。 使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。 电线被连接到空间变压器表面上的接触焊盘阵列。 空间变压器由多层集成电路芯片封装基板形成。 电线与接触位置阵列一样密集。 围绕着向外突出的线的阵列设置模具。 液体弹性体设置在模具中以填充电线之间的空间。 弹性体被固化并且模具被去除，留下布置在弹性体中并且与空间变压器电接触的线阵列。空间变压器可以具有一组引脚，这些引脚位于空间变压器的相反表面上， 其中细长导体被接合。 这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。 或者，插入器电连接器可以设置在第一和第二空间变压器之间。

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