公开(公告)号：US08039937B2

公开(公告)日：2011-10-18

申请号：US12432003

申请日：2009-04-29

申请人： Hyun-Soo Chung ,  Seung-Kwan Ryu ,  Ju-Il Choi ,  Dong-Ho Lee ,  Seong-Deok Hwang

发明人： Hyun-Soo Chung ,  Seung-Kwan Ryu ,  Ju-Il Choi ,  Dong-Ho Lee ,  Seong-Deok Hwang

IPC分类号： H01L23/02

CPC分类号： H01L21/76898 ,  H01L23/3128 ,  H01L23/3178 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02313 ,  H01L2224/02372 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/06181 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/01028 ,  H01L2224/03

摘要： Provided are methods of fabricating semiconductor chips, semiconductor chips formed by the methods, and chip-stack packages having the semiconductor chips. One embodiment specifies a method that includes patterning a scribe line region of a semiconductor substrate to form a semiconductor strut spaced apart from edges of a chip region of the semiconductor substrate.

摘要翻译： 提供制造半导体芯片的方法，通过该方法形成的半导体芯片和具有半导体芯片的芯片堆叠封装。 一个实施例规定了一种方法，其包括图案化半导体衬底的划线区域以形成与半导体衬底的芯片区域的边缘间隔开的半导体支柱。

公开(公告)号：US07969024B2

公开(公告)日：2011-06-28

申请号：US12453103

申请日：2009-04-29

申请人： Hyun-soo Chung ,  Jae-shin Cho ,  Seong-deok Hwang ,  Jum-gon Kim ,  Ki-hyuk Kim

发明人： Hyun-soo Chung ,  Jae-shin Cho ,  Seong-deok Hwang ,  Jum-gon Kim ,  Ki-hyuk Kim

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/49811 ,  H01L23/525 ,  H01L23/53252 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0236 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/325 ,  H05K2201/10348 ,  H05K2201/10977 ,  H01L2924/00014

摘要： A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.

摘要翻译： 公开了一种具有改进的接头可靠性的半导体封装以及制造半导体封装的方法。 可以在其上可以布置半导体器件的半导体晶片的表面上形成导电连接器。 包括连接焊盘的一部分露出的第一开口的第一绝缘层可以形成在连接焊盘和半导体晶片上。 电连接到连接焊盘的暴露部分的再布线可以形成在第一绝缘层上。 可以在重新配线和第一绝缘层上形成第二绝缘层，该第二绝缘层包括第二开口，重新布线的一部分暴露在第二开口中。 包括一个或多个缠结线的连接端子可以形成在重新布线的暴露部分上，以便电连接到重新布线。

公开(公告)号：US20100176415A1

公开(公告)日：2010-07-15

申请号：US12686501

申请日：2010-01-13

申请人： Seung-Jae Lee ,  Seong-Deok Hwang ,  Yu-Sik Kim ,  Sun-Pil Youn

发明人： Seung-Jae Lee ,  Seong-Deok Hwang ,  Yu-Sik Kim ,  Sun-Pil Youn

IPC分类号： H01L33/00

CPC分类号： H01L33/20 ,  H01L33/22 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/13 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2933/0091 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05005 ,  H01L2224/05541

摘要： A light emitting device having a high degree of light extraction efficiency includes a substrate, and a light emitting structure disposed on one surface of the substrate, the substrate having an internal reformed region where the index of refraction differs from the remainder the substrate. The ratio of the depth of the reformed region (distance between the other surface of the substrate and the reformed region) to the thickness of the substrate is in a range of between 1/8 and 9/11.

摘要翻译： 具有高光提取效率的发光器件包括衬底和设置在衬底的一个表面上的发光结构，所述衬底具有内部重整区域，其中折射率不同于衬底的剩余部分。 重整区域的深度（基板的另一表面与重整区域之间的距离）与基板的厚度的比率在1/8和9/11之间的范围内。

公开(公告)号：US20090315177A1

公开(公告)日：2009-12-24

申请号：US12453103

申请日：2009-04-29

申请人： Hyun-soo Chung ,  Jae-shin Cho ,  Seong-deok Hwang ,  Jum-gon Kim ,  Ki-hyuk Kim

发明人： Hyun-soo Chung ,  Jae-shin Cho ,  Seong-deok Hwang ,  Jum-gon Kim ,  Ki-hyuk Kim

IPC分类号： H01L23/498

CPC分类号： H01L23/49811 ,  H01L23/525 ,  H01L23/53252 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0236 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/325 ,  H05K2201/10348 ,  H05K2201/10977 ,  H01L2924/00014

摘要： A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.

摘要翻译： 公开了一种具有改进的接头可靠性的半导体封装以及制造半导体封装的方法。 可以在其上可以布置半导体器件的半导体晶片的表面上形成导电连接器。 包括连接焊盘的一部分露出的第一开口的第一绝缘层可以形成在连接焊盘和半导体晶片上。 电连接到连接焊盘的暴露部分的再布线可以形成在第一绝缘层上。 可以在重新配线和第一绝缘层上形成第二绝缘层，该第二绝缘层包括第二开口，重新布线的一部分暴露在第二开口中。 包括一个或多个缠结线的连接端子可以形成在重新布线的暴露部分上，以便电连接到重新布线。

公开(公告)号：US20090267211A1

公开(公告)日：2009-10-29

申请号：US12498913

申请日：2009-07-07

申请人： Hyun-Soo CHUNG ,  In-Young LEE ,  Son-Kwan HWANG ,  Dong-Ho LEE ,  Seong-Deok HWANG

发明人： Hyun-Soo CHUNG ,  In-Young LEE ,  Son-Kwan HWANG ,  Dong-Ho LEE ,  Seong-Deok HWANG

IPC分类号： H01L23/52 ,  H01L23/538 ,  H01L23/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06586 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01093 ,  H01L2224/11 ,  H01L2224/05552

摘要： Wafer level packages and methods of fabricating the same are provided. In one embodiment, one of the methods comprises forming semiconductor chips having a connection pad on a wafer, patterning a bottom surface of the wafer to form a trench under the connection pad, patterning a bottom surface of the trench to form a via hole exposing the bottom surface of the connection pad, and forming a connecting device connected to the connection pad through the via hole. The invention provides a wafer level package having reduced thickness, lower fabrication costs, and increased reliability compared to conventional packages.

摘要翻译： 提供了晶片级封装及其制造方法。 在一个实施例中，方法之一包括形成在晶片上具有连接焊盘的半导体芯片，图案化晶片的底表面以在连接焊盘下方形成沟槽，图案化沟槽的底表面以形成通孔， 并且通过通孔形成连接到连接垫的连接装置。 本发明提供了与传统封装相比，具有减小的厚度，较低的制造成本和增加的可靠性的晶片级封装。

公开(公告)号：US20070267738A1

公开(公告)日：2007-11-22

申请号：US11751464

申请日：2007-05-21

申请人： Hyun-Soo CHUNG ,  Cha-Jea JO ,  Dong-Ho LEE ,  Seong-Deok HWANG

发明人： Hyun-Soo CHUNG ,  Cha-Jea JO ,  Dong-Ho LEE ,  Seong-Deok HWANG

IPC分类号： H01L23/34 ,  H01L21/00

CPC分类号： H01L23/473 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

摘要： Provided is a semiconductor device having a cooling path on its bottom surface. The stack-type semiconductor device having a cooling path comprises a stack-type semiconductor chip comprising a first semiconductor chip and a second semiconductor chip. The first semiconductor chip comprises a first surface in which a circuit unit is formed and a second surface in which a first cooling path is formed, and the second semiconductor chip comprises a first surface in which a circuit unit is formed and a second surface in which a second cooling path is formed. The second surface of the first semiconductor chip and the second surface of the second semiconductor chip are bonded to each other, and a third cooling path is formed in the middle of the stack-type semiconductor chip using the first and second cooling paths. Warpage of the stack-type semiconductor device is suppressed and heat is easily dissipated.

摘要翻译： 提供了在其底面上具有冷却路径的半导体器件。 具有冷却路径的叠层型半导体器件包括：堆叠型半导体芯片，包括第一半导体芯片和第二半导体芯片。 第一半导体芯片包括其中形成有电路单元的第一表面和形成有第一冷却路径的第二表面，并且第二半导体芯片包括其中形成电路单元的第一表面和第二表面，其中第二表面 形成第二冷却路径。 第一半导体芯片的第二表面和第二半导体芯片的第二表面彼此接合，并且使用第一和第二冷却路径在堆叠型半导体芯片的中间形成第三冷却路径。 堆叠型半导体器件的翘曲被抑制，并且易于散热。

公开(公告)号：US08415181B2

公开(公告)日：2013-04-09

申请号：US13343147

申请日：2012-01-04

申请人： Yu-Sik Kim ,  Seong-Deok Hwang ,  Seung-Jae Lee ,  Sun-Pil Youn

发明人： Yu-Sik Kim ,  Seong-Deok Hwang ,  Seung-Jae Lee ,  Sun-Pil Youn

IPC分类号： H01L21/00

CPC分类号： H01L33/48 ,  H01L33/20 ,  H01L33/24 ,  H01L33/405 ,  H01L33/44 ,  H01L33/46 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/13 ,  H01L2224/48091 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/0542 ,  H01L2924/0543 ,  H01L2924/0544

摘要： Provided is a light emitting element, a light emitting device including the same, and fabrication methods of the light emitting element and light emitting device. The light emitting device comprises a substrate, a light emitting structure including a first conductive layer of a first conductivity type, a light emitting layer, and a second conductive layer of a second conductivity type which are sequentially stacked, a first electrode which is electrically connected with the first conductive layer; and a second electrode which is electrically connected with the second conductive layer and separated apart from the first electrode, wherein at least a part of the second electrode is connected from a top of the light emitting structure, through a sidewall of the light emitting structure, and to a sidewall of the substrate.

摘要翻译： 提供了一种发光元件，包括该发光元件的发光器件，以及发光元件和发光器件的制造方法。 发光装置包括基板，发光结构，其包括依次堆叠的第一导电类型的第一导电层，发光层和第二导电类型的第二导电层，电连接的第一电极 与第一导电层; 以及与所述第二导电层电连接并与所述第一电极分离的第二电极，其中所述第二电极的至少一部分通过所述发光结构的侧壁从所述发光结构的顶部连接， 和衬底的侧壁。

公开(公告)号：US20120181558A1

公开(公告)日：2012-07-19

申请号：US13240418

申请日：2011-09-22

申请人： Seong-deok HWANG

发明人： Seong-deok HWANG

IPC分类号： H01L33/50 ,  H01L33/00 ,  H01L33/62

CPC分类号： H01L33/62 ,  H01L33/0079 ,  H01L33/22 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2933/0066 ,  H01L2924/00

摘要： A wafer level light-emitting device package may include a polymer layer that bonds a light-emitting structure to a package substrate, and the polymer layer and the package substrate may include a plurality of via holes. Also, a method of manufacturing the wafer level light-emitting device package may include forming the polymer layer on the light-emitting structure, bonding the package substrate onto the polymer layer by applying heat and pressure, and forming a plurality of via holes in the polymer layer and the package substrate.

摘要翻译： 晶片级发光器件封装可以包括将发光结构结合到封装衬底的聚合物层，并且聚合物层和封装衬底可以包括多个通孔。 此外，制造晶片级发光器件封装的方法可以包括在发光结构上形成聚合物层，通过施加热和压力将封装衬底粘合到聚合物层上，并在其中形成多个通孔 聚合物层和封装衬底。

公开(公告)号：US20120153334A1

公开(公告)日：2012-06-21

申请号：US13327189

申请日：2011-12-15

申请人： Hun Yong PARK ,  Seong Deok Hwang ,  Won Ho Jung

发明人： Hun Yong PARK ,  Seong Deok Hwang ,  Won Ho Jung

IPC分类号： H01L33/58

CPC分类号： H01L33/58 ,  H01L33/486 ,  H01L33/60 ,  H01L2224/48091 ,  Y10S362/80 ,  H01L2924/00014

摘要： A light emitting diode (LED) package is provided. The LED package includes an LED, a plurality of lead frames electrically connected with the LED, a package body having a receiving groove exposed to receive the LED therein and including a plurality of supporting units provided to project from an inner side surface of the receiving groove, and a filling member having an engaging groove engaged with the supporting unit at a circumference of a side surface thereof, and included inside the receiving groove.

摘要翻译： 提供了一种发光二极管（LED）封装。 LED封装包括LED，与LED电连接的多个引线框架，封装体，其具有暴露以容纳LED的接收槽，并且包括多个支撑单元，所述支撑单元设置成从接收槽的内侧表面突出 以及填充构件，其具有在其侧表面的圆周处与所述支撑单元接合并且包括在所述接收槽内部的接合槽。

公开(公告)号：US08111520B2

公开(公告)日：2012-02-07

申请号：US12344817

申请日：2008-12-29

申请人： Hyun-Soo Chung ,  Dong-Ho Lee ,  Dong-Han Kim ,  Seong-Deok Hwang ,  Ki-Hyuk Kim

发明人： Hyun-Soo Chung ,  Dong-Ho Lee ,  Dong-Han Kim ,  Seong-Deok Hwang ,  Ki-Hyuk Kim

IPC分类号： H05K1/18

CPC分类号： H05K1/185 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H05K3/3457 ,  H05K3/4694 ,  H05K2201/10719

摘要： A semiconductor module can include a printed circuit board (PCB) and a semiconductor package inserted into an inner space of the PCB. The semiconductor package may be electrically connected to the PCB. The PCB may thus surround the semiconductor package so that cracks may not be generated in the outer terminals.

摘要翻译： 半导体模块可以包括插入到PCB的内部空间中的印刷电路板（PCB）和半导体封装。 半导体封装可以电连接到PCB。 因此，PCB可以围绕半导体封装，从而可能不会在外部端子中产生裂纹。