公开(公告)号：US20130217155A1

公开(公告)日：2013-08-22

申请号：US13607504

申请日：2012-09-07

申请人： Kazuya Fukuhara ,  Masayuki Hatano

发明人： Kazuya Fukuhara ,  Masayuki Hatano

IPC分类号： B05D3/00 ,  H01L21/31 ,  C23C16/52

CPC分类号： B29C43/021 ,  B29C2043/025 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/565 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a pattern forming method using a template containing a pattern that has at least one recess section or protrusion section to transfer the shape of the pattern to a resin layer on a substrate, is provided. The method includes a process for coating the resin on the substrate, a process for making the hardness of the first portion as a portion of the resin higher than the hardness of the second portion as the portion other than the first portion, and a process in which the portion other than the pattern of the template makes contact with the first portion, in a state where a gap is maintained between the template and the resin, the shape of the pattern is transferred to the second portion, and the resin is cured. Embodiments of an apparatus for pattern forming are also provided.

摘要翻译： 根据一个实施例，提供一种使用包含具有至少一个凹部或突起部的图案的模板的图案形成方法，以将图案的形状转印到基板上的树脂层。 该方法包括在基板上涂布树脂的方法，使作为树脂部分的第一部分的硬度高于作为第一部分以外的部分的第二部分的硬度的方法，以及 在模板和树脂之间保持间隙的状态下，模板图案之外的部分与第一部分接触的部分，图案的形状被转印到第二部分，树脂固化。 还提供了用于图案形成的装置的实施例。

公开(公告)号：US08180472B2

公开(公告)日：2012-05-15

申请号：US12497349

申请日：2009-07-02

申请人： Masayuki Hatano ,  Tetsuro Nakasugi

发明人： Masayuki Hatano ,  Tetsuro Nakasugi

IPC分类号： G06F19/00

CPC分类号： G05B19/41875 ,  G05B2219/31265 ,  G05B2219/32196 ,  Y02P90/22

摘要： A control method for a semiconductor manufacturing apparatus, comprising: generating, as log data, a history of operation states of the semiconductor manufacturing apparatus when a wafer is processed by the semiconductor manufacturing apparatus; specifying, based on the log data, processing results in which operation states of the semiconductor manufacturing apparatus are abnormal states out of processing results after the processing of the wafer processed by the semiconductor manufacturing apparatus as abnormal processing results; creating control data for the semiconductor manufacturing apparatus based on the processing results and the abnormal processing results; and controlling the processing by the semiconductor manufacturing apparatus using the control data.

摘要翻译： 一种半导体制造装置的控制方法，包括：当半导体制造装置处理晶片时，产生作为对数数据的半导体制造装置的工作状态的历史; 基于对数数据，指定在由半导体制造装置处理的晶片处理之后的处理结果中作为异常处理结果的半导体制造装置的操作状态为异常状态的处理结果; 基于处理结果和异常处理结果创建半导体制造装置的控制数据; 以及使用控制数据来控制半导体制造装置的处理。

公开(公告)号：US08118585B2

公开(公告)日：2012-02-21

申请号：US12882944

申请日：2010-09-15

申请人： Masayuki Hatano ,  Suigen Kyoh ,  Tetsuro Nakasugi

发明人： Masayuki Hatano ,  Suigen Kyoh ,  Tetsuro Nakasugi

IPC分类号： A01J21/00

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00 ,  G03F9/00

摘要： In one embodiment, a pattern formation method is disclosed. The method can place a liquid resin material on a workpiece substrate. The method can press a template against the resin material and measuring distance between a lower surface of a projection of the template and an upper surface of the workpiece substrate. The template includes a pattern formation region and a circumferential region around the pattern formation region. A pattern for circuit pattern formation is formed in the pattern formation region and the projection is formed in the circumferential region. The method can form a resin pattern by curing the resin material in a state of pressing the template. In addition, the method can separate the template from the resin pattern.

摘要翻译： 在一个实施例中，公开了图案形成方法。 该方法可以将液态树脂材料放置在工件基板上。 该方法可以将模板压靠树脂材料并测量模板的突起的下表面与工件基板的上表面之间的距离。 模板包括图案形成区域和围绕图案形成区域的周边区域。 在图案形成区域中形成用于电路图案形成的图案，并且在周向区域中形成突起。 该方法可以通过在压制模板的状态下固化树脂材料来形成树脂图案。 此外，该方法可以将模板与树脂图案分离。

公开(公告)号：US07906258B2

公开(公告)日：2011-03-15

申请号：US12047516

申请日：2008-03-13

申请人： Nobuhiro Komine ,  Kazutaka Ishigo ,  Noriaki Sasaki ,  Masayuki Hatano

发明人： Nobuhiro Komine ,  Kazutaka Ishigo ,  Noriaki Sasaki ,  Masayuki Hatano

IPC分类号： G03F1/00 ,  G03C5/00 ,  H01L21/00

CPC分类号： G03F9/7076 ,  G03F1/36 ,  G03F1/42 ,  G03F7/70633

摘要： In a photomask in which a device pattern, an alignment mark and a superimposition inspection mark are formed on a light transmitting base, each of the alignment mark and the superimposition inspection mark includes a main mark portion, and first and second auxiliary pattern portions. The main mark portion is constituted of one of a space pattern and a line pattern, the pattern having a linear width to be resolved on a photosensitive film formed on a semiconductor wafer, and each of the first and second auxiliary pattern portions includes an auxiliary pattern constituted of one of a repeated pattern of a space pattern and a repeated pattern of a line pattern, the repeated pattern having a linear width not to be resolved on the photosensitive film. The pitch of the repeated pattern is equal to the minimum pitch of the device pattern.

摘要翻译： 在其中在透光基底上形成器件图案，对准标记和叠加检查标记的光掩模中，每个对准标记和叠加检查标记都包括主标记部分和第一和第二辅助图案部分。 主标记部分由空间图案和线条图案之一构成，该图形具有在半导体晶片上形成的感光膜上被分辨的线宽，并且第一和第二辅助图案部分中的每一个包括辅助图案 由空间图案的重复图案和线图案的重复图案之一构成，重复图案具有在感光膜上不被分辨的线宽。 重复图案的间距等于设备图案的最小间距。

公开(公告)号：US20100304280A1

公开(公告)日：2010-12-02

申请号：US12718370

申请日：2010-03-05

申请人： Masayuki HATANO

发明人： Masayuki HATANO

IPC分类号： G03F1/00 ,  G03F7/20

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00

摘要： A method of manufacturing a semiconductor device using a template on which a pattern is formed beforehand is disclosed. An error between a position of the pattern formed on the template and a reference position where the pattern is to be formed is obtained. An outer shape of the template is processed in accordance with the obtained error. The error of the template is corrected by distorting the template through application of pressure to a side face of the template whose outer shape is processed. The pattern is transferred onto a transfer layer formed on a semiconductor substrate by using the template in which the error is corrected.

摘要翻译： 公开了使用预先形成图案的模板来制造半导体器件的方法。 获得在模板上形成的图案的位置与要形成图案的基准位置之间的误差。 根据获得的误差对模板的外形进行处理。 通过对外部形状的模板的侧面施加压力使模板变形来校正模板的误差。 通过使用校正了误差的模板将图案转印到形成在半导体衬底上的转印层上。

公开(公告)号：US6035893A

公开(公告)日：2000-03-14

申请号：US882291

申请日：1997-06-25

申请人： Tadahiro Ohmi ,  Michio Yamaji ,  Nobukazu Ikeda ,  Masayuki Hatano ,  Kosuke Yokoyama ,  Shigeaki Tanaka

发明人： Tadahiro Ohmi ,  Michio Yamaji ,  Nobukazu Ikeda ,  Masayuki Hatano ,  Kosuke Yokoyama ,  Shigeaki Tanaka

IPC分类号： F16K1/52 ,  F15B13/00 ,  F15B13/08 ,  F15C3/00 ,  F16K27/00 ,  G05D7/00 ,  G05D7/06 ,  F16K11/10

CPC分类号： F15B13/0814 ,  F15B13/0825 ,  F15B13/0835 ,  F15B13/0871 ,  F15B13/0892 ,  F16K27/003 ,  Y10T137/87249 ,  Y10T137/87684 ,  Y10T137/87877 ,  Y10T137/87885

摘要： A valve main body is internally formed with a main channel extending from a rear end face thereof nearly to a first valve actuator, and two subchannels communicating with the main channel via second and third valve actuators, respectively. The valve main body has a slanting face extending forwardly downward and having the first valve actuator mounted thereon.

摘要翻译： 阀主体内部形成有从其后端面延伸到第一阀致动器的主通道，以及分别经由第二和第三阀致动器与主通道连通的两个子通道。 阀主体具有向前延伸并且安装有第一阀致动器的倾斜面。

公开(公告)号：US5668691A

公开(公告)日：1997-09-16

申请号：US634232

申请日：1996-04-18

申请人： Hiroki Ito ,  Takashi Moriyama ,  Kenji Kamei ,  Suenobu Hamano ,  Etsuo Nitta ,  Naoaki Takeji ,  Koji Yamaji ,  Masayuki Hatano

发明人： Hiroki Ito ,  Takashi Moriyama ,  Kenji Kamei ,  Suenobu Hamano ,  Etsuo Nitta ,  Naoaki Takeji ,  Koji Yamaji ,  Masayuki Hatano

IPC分类号： H01H33/59 ,  H02H3/00 ,  H01H9/30

CPC分类号： H01H33/596

摘要： A small-sized arrangement for a DC circuit breaker with a reactor and a capacitor connected in series is provided which includes a DC circuit breaker, a parallel impedance means with a suitably determined inductance and a suitable capacitance less in value than the inductance, and an energy-absorbing element. The parallel impedance means has a parallel reactor of a carefully selected inductance and a parallel capacitor of a smaller capacitance value. Determining the inductance and capacitance values of the parallel reactors and parallel capacitors employed in the parallel impedance means to satisfy a certain condition defined by specific formulas can cause the DC circuit breaker to take full advantage of the inherent performance thereof while allowing the interruption time to remain minimized, thereby achieving enhanced interruption performance. Since the capacitance of the parallel capacitor is rendered relatively smaller, the device can be small in size and low in cost.

摘要翻译： 提供一种用于具有串联连接的电抗器和电容器的DC断路器的小尺寸布置，其包括DC断路器，具有适当确定的电感的并联阻抗装置和具有比电感值小的适当电容，并且 能量吸收元件。 并联阻抗装置具有仔细选择的电感的并联电抗器和较小电容值的并联电容器。 确定并联电抗器和并联电容器中使用的并联电抗器和并联电容器的电感和电容值意味着满足特定公式定义的特定条件可以使直流断路器充分利用其固有性能，同时允许中断时间保持 最小化，从而实现增强的中断性能。 由于并联电容器的电容相对较小，因此该器件的体积小，成本低。

公开(公告)号：US08906281B2

公开(公告)日：2014-12-09

申请号：US13402244

申请日：2012-02-22

申请人： Masayuki Hatano ,  Takumi Ota ,  Yohko Furutono

发明人： Masayuki Hatano ,  Takumi Ota ,  Yohko Furutono

IPC分类号： B29C59/02 ,  G03F7/00

CPC分类号： G03F7/002 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

摘要： In an imprint method according to one embodiment, a template on which a template pattern is formed is pushed against resist on a substrate to be transferred while the resist is cured in this state. The template is subsequently separated from the cured resist. The template is then degassed from the template pattern surface side between after the template is separated from the cured resist and till the template is pushed against resist at the next shot.

摘要翻译： 在根据一个实施例的压印方法中，在该状态下，在抗蚀剂固化的同时，将其上形成有模板图案的模板压在要转印的基板上的抗蚀剂上。 随后将模板与固化的抗蚀剂分离。 然后在模板与固化的抗蚀剂分离之后，直到模板在下一次照射下被抵抗抗蚀剂时，模板从模板图案表面侧脱气。

公开(公告)号：US20130224963A1

公开(公告)日：2013-08-29

申请号：US13599358

申请日：2012-08-30

申请人： Masayuki HATANO ,  Hiroshi TOKUE

发明人： Masayuki HATANO ,  Hiroshi TOKUE

IPC分类号： H01L21/30 ,  B05C13/00

CPC分类号： C23C16/52 ,  B82Y10/00 ,  B82Y40/00 ,  C23C16/4401 ,  G03F7/0002 ,  H01L21/6715

摘要： According to one embodiment, a semiconductor manufacturing apparatus includes a substrate stage, a transfer unit, and a control unit. A substrate is settable on the substrate stage. The transfer unit is configured to transfer a pattern having an uneven configuration onto a major surface of the substrate by attachably and removably holding a template. The pattern is provided in the transfer surface. The control unit is configured to acquire information relating to a number of foreign objects on the major surface prior to the transferring of the pattern. The control unit adds the number for a plurality of the substrates including the pattern transferred by the transfer unit. The control unit causes the transfer unit not to implement the transferring of the pattern in the case where the sum has reached the upper limit.

摘要翻译： 根据一个实施例，半导体制造装置包括基板台，转印单元和控制单元。 衬底可在衬底台上设置。 转印单元被配置为通过可附接地和可移除地保持模板将具有不均匀构造的图案转印到基板的主表面上。 转印面上设有图案。 控制单元被配置为在传送图案之前获取与主表面上的多个异物相关的信息。 控制单元添加包括由传送单元传送的图案的多个基板的数量。 在总和达到上限的情况下，控制单元使得传送单元不执行图案的传送。

公开(公告)号：US20120244719A1

公开(公告)日：2012-09-27

申请号：US13402244

申请日：2012-02-22

申请人： Masayuki HATANO ,  Takumi OTA ,  Yohko FURUTONO

发明人： Masayuki HATANO ,  Takumi OTA ,  Yohko FURUTONO

IPC分类号： H01L21/304 ,  B29C59/02 ,  B29C47/76

CPC分类号： G03F7/002 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

摘要： In an imprint method according to one embodiment, a template on which a template pattern is formed is pushed against resist on a substrate to be transferred while the resist is cured in this state. The template is subsequently separated from the cured resist. The template is then degassed from the template pattern surface side between after the template is separated from the cured resist and till the template is pushed against resist at the next shot.

摘要翻译： 在根据一个实施例的压印方法中，在该状态下，在抗蚀剂固化的同时，将其上形成有模板图案的模板压在要转印的基板上的抗蚀剂上。 随后将模板与固化的抗蚀剂分离。 然后在模板与固化的抗蚀剂分离之后，直到模板在下一次照射下被抵抗抗蚀剂时，模板从模板图案表面侧脱气。