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公开(公告)号：US20190253082A1
公开(公告)日：2019-08-15
申请号：US16395117
申请日：2019-04-25
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/1165 , H03M13/255 , H03M13/271 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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242.发明申请公开(公告)号：US20190230199A1
公开(公告)日：2019-07-25
申请号：US16313790
申请日：2017-07-05
Inventor： Bo-Mi LIM , Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
IPC: H04L29/08
Abstract: An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time-interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling start position information and size information for each of Physical Layer Pipes (PLPs). In this case, the Physical Layer Pipes include a core layer physical layer pipe corresponding to the core layer signal and an enhanced layer physical layer pipe corresponding to the enhanced layer signal.
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公开(公告)号：US20190229754A1
公开(公告)日：2019-07-25
申请号：US16369742
申请日：2019-03-29
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , G06F11/1004 , G06F11/1076 , G11B20/1806 , G11B20/1809 , G11B2020/185 , H03M13/1102 , H03M13/1165 , H03M13/255 , H03M13/27 , H03M13/2778
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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公开(公告)号：US20190222231A1
公开(公告)日：2019-07-18
申请号：US16353423
申请日：2019-03-14
Inventor： Bo-Mi LIM , Sun-Hyoung KWON , Sung-Ik PARK , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2732 , H04L1/0043 , H04L1/0048 , H04L1/0057 , H04L1/0059 , H04L1/007 , H04L1/0071 , H04L47/6245
Abstract: An apparatus and method for time interleaving corresponding to hybrid time interleaving mode are disclosed. An apparatus for time interleaving according to an embodiment of the present invention includes a twisted block interleaver configured to perform intra-subframe interleaving corresponding to time interleaving blocks; and a convolutional delay line configured to perform inter-subframe interleaving using an output of the twisted block interleaver.
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245.发明申请公开(公告)号：US20190215009A1
公开(公告)日：2019-07-11
申请号：US16353378
申请日：2019-03-14
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM
Abstract: A parity puncturing apparatus and method for fixed length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
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Patent Agency Ranking
246.发明申请公开(公告)号：US20190174200A1
公开(公告)日：2019-06-06
申请号：US16210961
申请日：2018-12-05
Inventor： Dong-Joon CHOI , Heung-Mook KIM , Sung-Ik PARK , Joon-Young JUNG , Yong-Seong CHO
Abstract: Disclosed herein are a method for providing an ad-hoc broadcast service based on channel sharing and an apparatus for the same. The method is configured such that a master broadcast transmitter for providing an ad-hoc broadcast service receives a request to share a channel from a new broadcast transmitter, allocates one of multiple subframes, into which the transmission frame of any one broadcast channel corresponding to the ad-hoc broadcast service is divided, to the new broadcast transmitter, and controls the new broadcast transmitter in real time by performing synchronization with the new broadcast transmitter based on reference time information included in a control Physical Layer Pipe (PLP).
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247.发明申请公开(公告)号：US20190173490A1
公开(公告)日：2019-06-06
申请号：US16158375
申请日：2018-10-12
Inventor： Je-Won LEE , Eun-Hee HYUN , Heung-Mook KIM , Joon-Young JUNG
CPC classification number: H03M7/6047 , H03M7/30 , H03M7/3062 , H03M7/3066 , H03M7/40
Abstract: Disclosed herein are an apparatus and method for data compression and decompression based on calculation of an error vector magnitude. A data compression apparatus includes a lossy compression unit for calculating, in advance, a reference error vector magnitude depending on lossy compression and decompression by removing lower bits from a data signal composed of bitstreams, for setting removal target lower bits satisfying a preset error vector magnitude requirement, and for lossily compressing the data signal by removing the removal target lower bits from the data signal, and a communication unit for transmitting the compressed data signal to a data decompression apparatus.
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248.发明申请公开(公告)号：US20190132022A1
公开(公告)日：2019-05-02
申请号：US16131388
申请日：2018-09-14
Inventor： Joon-Young JUNG , Tae-Kyoon KIM , Eun-Hee HYUN , Heung-Mook KIM
IPC: H04B1/525 , H04L5/14 , H04L5/00 , H04B17/345 , H04B10/516
Abstract: Disclosed herein are a method for simultaneously transmitting/receiving upstream and downstream signals using a remote PHY architecture and an apparatus for the same. The method determines whether to divide frequencies depending on whether signal interference occurs among multiple cable modems connected to a cable network, if it is determined to divide the frequencies, categorize the multiple cable modems into multiple groups so that signal interference occurs in each group, but signal interference does not occur between groups, set transmission bands for the multiple groups so that an upstream band and a downstream band of one group alternate with upstream bands and downstream bands of remaining groups by dividing the frequencies in accordance with a number of groups, and cancels, by a remote physical layer (PHY) device located at an optical network terminal of the cable network, self-interference signals for respective groups based on the transmission bands.
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公开(公告)号：US20190052287A1
公开(公告)日：2019-02-14
申请号：US16100268
申请日：2018-08-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Nam-Ho HUR , Heung-Mook KIM
CPC classification number: H03M13/116 , H03M13/1105 , H03M13/118 , H03M13/6516 , H04L1/0057
Abstract: Disclosed herein are a channel coding/decoding method in which a parity check matrix is transformed and an apparatus using the same. The channel-coding method includes loading a first exponent matrix, transforming the first exponent matrix into a second exponent matrix, creating a parity check matrix corresponding to a required block size using the second exponent matrix, and performing LDPC encoding using the parity check matrix.
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250.发明申请公开(公告)号：US20190020354A1
公开(公告)日：2019-01-17
申请号：US16136073
申请日：2018-09-19
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/1102 , H03M13/116 , H03M13/1185 , H04L1/0041 , H04L1/0057 , H04L1/0058
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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