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公开(公告)号：US20240331603A1
公开(公告)日：2024-10-03
申请号：US18740677
申请日：2024-06-12
Inventor： Mingyue LI , Chao TIAN , Yanqing GUAN , Fei AI , Guanghui LIU
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/0283
Abstract: The present application discloses a gate drive circuit and a display device. The gate drive circuit includes a plurality of cascaded gate drive units, in which one of the gate drive units includes a first layout, an input module and a pull-up module. By receiving a potential changeable signal by the gate of a first transistor or the gate of a second thin-film transistor, it can alleviate or avoid current leakage caused when a first node keeps at a same voltage level for a long time, thereby improving the stability of the potential of the first node.
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公开(公告)号：US20230274701A1
公开(公告)日：2023-08-31
申请号：US17622633
申请日：2021-12-15
Inventor： Chao TIAN , Yanqing GUAN , Guanghui LIU , Fei AI
IPC: G09G3/3266 , G09G3/36 , G06F3/041
CPC classification number: G09G3/3266 , G09G3/3674 , G06F3/0412 , G06F3/04166 , G06F3/0418 , G09G2310/08 , G09G2354/00
Abstract: A gate driving circuit and a display device are provided. The gate driving circuit includes electrically connected multi-stage driving units. The driving unit of each stage includes an input module, an output module electrically connected with the input module, a pull-down module electrically connected with the output module, and a pull-down control module electrically connected with the pull-down module. The output module is electrically connected to a stage transmission signal output terminal, and the pull-down module is electrically connected to a first control signal terminal.
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公开(公告)号：US20220189429A1
公开(公告)日：2022-06-16
申请号：US17261014
申请日：2020-06-30
Inventor： Chao TIAN
IPC: G09G3/36
Abstract: A gate driver on array (GOA) circuit, a display panel and a display device are provided. The GOA circuit includes m cascaded GOA units. An nth-stage GOA unit includes a second feedback module. The second feedback module, electrically connected to the second node of the nth-stage GOA unit, a first node of the (n−1)th-stage GOA unit, the clock signal of the (n+1)th-stage GOA unit, a gate driving signal of the nth-stage GOA unit and the constant low voltage signal, to pull down voltage applied on a second node of the nth-stage GOA unit. The one-way feedback could achieve the linear design more easily, raise the circuit stability, and thus the GOA circuit could be integrated in the display panel more easily to achieve the design of placing the GOA circuit in the active area.
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公开(公告)号：US20210408072A1
公开(公告)日：2021-12-30
申请号：US16769254
申请日：2020-02-28
Inventor： Juncheng XIAO , Chao TIAN , Yanqing GUAN , Haiming CAO
Abstract: A display panel, a gate electrode driving circuit, and an electronic device are provided. The display panel includes a first metal layer including a first gate electrode; a second metal layer including a first source electrode, a first drain electrode, and a second gate electrode; two ends of a polycrystalline silicon semiconductor layer electrically connected to the first source electrode and the first drain electrode respectively; a third metal layer including a second source electrode and a second drain electrode; and two ends of a metal oxide semiconductor layer electrically connected to the second source electrode and the second drain electrode respectively.
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公开(公告)号：US20190333944A1
公开(公告)日：2019-10-31
申请号：US16086019
申请日：2018-08-07
Inventor： Juncheng XIAO , Chao TIAN
IPC: H01L27/12 , H01L29/786 , H01L29/66
Abstract: The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.
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Patent Agency Ranking
公开(公告)号：US20250087162A1
公开(公告)日：2025-03-13
申请号：US18248578
申请日：2023-03-29
Inventor： Mingyue LI , Chao TIAN , Yanqing GUAN , Fei AI , Guanghui LIU
IPC: G09G3/3266 , G09G3/32
Abstract: The present application provides a display panel and a display device, the display panel includes: N scan lines, the N is an integer greater than or equal to 1; and J sets of forward and reverse scan pull-down circuits, each set of the forward and reverse scan pull-down circuits includes N forward and reverse scan pull-down modules, at least a part of each of the forward and reverse scan pull-down modules is disposed in the display subarea, and the J is an integer greater than or equal to 1. In each set of the forward and reverse scan pull-down circuits, output terminals of the N forward and reverse scan pull-down modules are connected to the N scan lines in a one-to-one correspondence.
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公开(公告)号：US20240296767A1
公开(公告)日：2024-09-05
申请号：US17915517
申请日：2022-09-01
Inventor： Haiming CAO , Chao TIAN , Fei AI , Guanghui LIU
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0251 , G09G2310/0267 , G09G2320/0223
Abstract: The present disclosure provides a display panel and a display device. The display panel includes a plurality of scan lines and at least one pull-down circuit unit.disposed at intervals ina n The pull-down circuit includes a forward scan pull-down unit and/or a reverse scan pull-down unit. The forward scan pull-down unit receives a (n+m)th scan signal, a first control signal, and a reference low level signal, and is connected to the nth scan line. The reverse scan pull-down unit receives a (n−m)th scan signal, a second control signal, and the reference low level signal, and is connected to the nth scan line.
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公开(公告)号：US20240221564A1
公开(公告)日：2024-07-04
申请号：US17596876
申请日：2021-12-14
Inventor： Chao TIAN , Yanqing GUAN , Guanghui LIU , Fei AI
CPC classification number: G09G3/20 , H01L27/124 , G09G2310/0281
Abstract: The present application provides a display panel and an electronic device. The electronic device comprises the display panel. The display panel comprises a gate driving unit, a first auxiliary driving unit and scan lines. The first auxiliary driving unit rapidly pulls down the falling edge of the scan signal transmitted in the scan line to reduce the delay of the falling edge of the scan line. Thus, the number of gate driving units in the display panel can be reduced, thereby reducing the width of the frame of the display panel and the electronic device.
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公开(公告)号：US20240144872A1
公开(公告)日：2024-05-02
申请号：US17772186
申请日：2022-04-15
Inventor： Xuebin YUAN , Chao TIAN
IPC: G09G3/3233 , G09G3/32
CPC classification number: G09G3/3233 , G09G3/32 , G09G2310/0272 , G09G2310/08
Abstract: The present disclosure discloses a pixel circuit and a display panel. The pixel circuit includes a light emitting module and a driving module including at least two driving units connected in parallel. a quantity of displayable gray scales can be improved or increased by configuring at least two driving units connected in parallel in the driving module where the at least two driving units can each correspondingly configure a light emitting current so that a plurality of light emitting brightness of the light emitting module can be implemented by a sum of these light emitting currents.
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公开(公告)号：US20240021121A1
公开(公告)日：2024-01-18
申请号：US17605043
申请日：2021-06-01
Inventor： Chao TIAN
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0408 , G09G2310/0267
Abstract: A display panel integrated with a gate driving circuit in a display area is provided. In the display panel, gate driving signal lines and data lines are not arranged side by side between any same adjacent two columns of sub-pixels. This avoids possibility of arranging the data lines and the gate driving signal lines side by side between any same adjacent two columns of sub-pixels, prevents the data lines from being easily disturbed by a parasitic capacitance generated between the data lines and the gate driving signal lines, and also avoids abnormal images on the display panel.
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