-
公开(公告)号：US20200082746A1
公开(公告)日：2020-03-12
申请号：US16342209
申请日：2018-09-11
Inventor： Xin ZHANG , Juncheng XIAO , Yanqing GUAN , Chao TIAN
IPC: G09G3/20
Abstract: A pixel driving circuit is provided. The pixel driving circuit comprises a reset module, a compensation module and light emitting module, wherein the reset module is configured to transmit a data signal to the compensation module to reset the compensation module under controlling of a first driving signal, the compensation module is configured to write the data signal to compensate a threshold voltage under controlling of a second driving signal, and the light emitting module is configured to emit light under controlling of a third driving signal.
-
公开(公告)号：US20200035181A1
公开(公告)日：2020-01-30
申请号：US16342208
申请日：2018-09-26
Inventor： Xin ZHANG , Juncheng XIAO , Yanqing GUAN , Chao TIAN
IPC: G09G3/36
Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The control module is electrically connected to a positive scan control terminal, a negative scan control terminal, an (n−2)th scan terminal, an (n+2)th scan terminal, an (n+1)th clock terminal, an (n−1)th clock terminal, a high voltage terminal, and a low voltage terminal. The output module is electrically connected to the high voltage terminal, the low voltage terminal, an n-th clock terminal, an n-th scan terminal, and a controllable terminal. The pull-up supplement module includes a supplement switch that is electrically connected to the high voltage terminal, the control module, and the output module. The leakage switch is electrically connected to the control module, the output module, the supplement switch, and the low voltage terminal.
-
公开(公告)号：US20170256219A1
公开(公告)日：2017-09-07
申请号：US14895601
申请日：2015-11-06
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Ronglei DAI , Shangcao CAO , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/20 , G09G3/3648 , G09G2300/0408 , G09G2310/0218 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2330/026 , G11C19/28
Abstract: A gate on array (GOA) circuit for used in an LCD includes GOA units connected in cascade. An Nth GOA unit includes an Nth stage-transmittance circuit, an Nth Q-node controlling circuit, an Nth P-node controlling circuit, an Nth outputting circuit, and a first switch circuit where N is a positive integer. The first switch circuit connected to the Nth scanning line, for inputting an enabling signal to the Nth scanning line before the LCD shows images so as to turn on a TFT in a pixel which the Nth scanning line is connected to. The benefit of the function is that the display does not leak electricity when the black screen is woken up and that the stability of the circuit is enhanced at the same time.
-
公开(公告)号：US20170124975A1
公开(公告)日：2017-05-04
申请号：US15011502
申请日：2016-01-30
Inventor： Juncheng XIAO , Yao YAN , Ronglei DAI , Shangcao CAO
CPC classification number: G09G3/3677 , G06F3/0412 , G06F3/0416 , G09G2300/0408 , G09G2310/0202 , G09G2310/0286
Abstract: The disclosure discloses a GOA circuit and a liquid crystal display apparatus. The GOA circuit includes a number of GOA unit in cascade connection, wherein the Nth level GOA unit includes a common signal point control module, a gate signal point control module, and a GAS signal operation module; wherein the common signal point control module is used to pull up the electrical level of the common signal point after the period of all gate on; a gate signal point control module is used to pull down the electrical level of a gate signal point after the period of all gate on; the GAS signal operation module is used to achieve the all gate on function by a first GAS signal and a second GAS signal to control the output of the Nth level gate driving signal in the touch panel scanning period.
-
公开(公告)号：US20160358572A1
公开(公告)日：2016-12-08
申请号：US14772386
申请日：2015-07-15
Inventor： Juncheng XIAO , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2310/0202 , G09G2310/0286 , G09G2310/08 , G11C19/287
Abstract: A scan driver circuit for driving scanning lines is proposed. The scan driver circuit includes a pull-down control module, a pull-down module, a recovering control module, a recovering module, a downlink module, a first bootstrap capacitor, a constant low voltage supply, and a constant high voltage supply. The present inventive scan driver circuit has advantages of simple structure and low power consumption.
Abstract translation: 提出了一种用于驱动扫描线的扫描驱动电路。 扫描驱动电路包括下拉控制模块，下拉模块，恢复控制模块，恢复模块，下行链路模块，第一自举电容器，恒定低压电源和恒定高压电源。 本发明的扫描驱动电路具有结构简单，功耗低的优点。
-
Patent Agency Ranking
公开(公告)号：US20160358568A1
公开(公告)日：2016-12-08
申请号：US14783095
申请日：2015-08-10
Inventor： Juncheng XIAO , Mang ZHAO , Yong TIAN
IPC: G09G3/36
CPC classification number: G09G3/3674 , G09G2310/0286 , G09G2320/0223 , G09G2320/041 , G09G2330/021 , G11C19/28
Abstract: A scan driving circuit is disclosed for executing a driving operation for cascaded scan lines and includes a pull-down control module, a pull-down module, a reset control module, a reset module, a down-stream module, a first bootstrap capacitor, a constant low-level voltage source utilized, and a constant high-level voltage source. The whole structure of the disclosed scan driving circuit is simple, and power consumption is low.
Abstract translation: 公开了一种用于执行级联扫描线的驱动操作的扫描驱动电路，包括下拉控制模块，下拉模块，复位控制模块，复位模块，下游模块，第一自举电容器， 使用恒定的低电平电压源和恒定的高电平电压源。 所公开的扫描驱动电路的整体结构简单，功耗低。
-
公开(公告)号：US20230163136A1
公开(公告)日：2023-05-25
申请号：US16966119
申请日：2020-04-20
Inventor： Juncheng XIAO , Yong XU , Fei AI , Dewei SONG
IPC: H01L27/12
CPC classification number: H01L27/1225 , H01L27/1288 , H01L27/1285
Abstract: A display panel, an array substrate, and a manufacturing method thereof, wherein the array substrate includes a thin film transistor device, and an interface layer, a first transparent conductive layer, a passivation layer, and a second transparent conductive layer which are formed on the thin film transistor device in sequence. By replacing a planarization layer in the prior art with the interface layer, performing a gate re-etching process, and perforating the interface layer and the passivation layer to simultaneously form a deep via and a shallow via, a number of photomasks required to form the array substrate is reduced to 8. It effectively reduces costs of production materials and costs of photomasks.
-
公开(公告)号：US20210225891A1
公开(公告)日：2021-07-22
申请号：US16097891
申请日：2018-08-01
Inventor： Juncheng XIAO , Chao TIAN
IPC: H01L27/12 , H01L21/8234 , H01L29/786
Abstract: The present disclosure provides an array substrate and a method for manufacturing the same. The method includes providing a substrate, and forming a polysilicon layer, a gate insulating layer, a second buffer layer, a patterned second metal layer, and a third buffer layer on the substrate in turn; forming a through-hole by a mask process, wherein the through-hole passes through the passivation layer, the third buffer layer, the second buffer layer, and the gate insulating layer to contact the polysilicon layer.
-
公开(公告)号：US20210225311A1
公开(公告)日：2021-07-22
申请号：US16302678
申请日：2018-08-16
Inventor： Xin ZHANG , Juncheng XIAO , Chao TIAN , Yanqing GUAN
IPC: G09G3/36
Abstract: A gate driver on array (GOA) circuit, a liquid crystal panel comprising the GOA circuit, and a display device including the liquid crystal panel are provided. The GOA circuit comprises a forward and backward scanning control module configured to control the GOA circuit to perform forward scan or backward scan according to a forward scanning signal or a backward scanning signal respectively, a first voltage stabilizing module configured to maintain a voltage level of a first node, and a second voltage stabilizing module electrically connecting to the forward and backward scanning control module, and configured to maintain a voltage level of an output signal of the forward and backward scanning control module.
-
公开(公告)号：US20190156777A1
公开(公告)日：2019-05-23
申请号：US15745098
申请日：2017-11-27
Inventor： Juncheng XIAO , Yanqing GUAN
IPC: G09G3/36 , G02F1/1345 , H01L27/12
Abstract: This invention provides a GOA circuit comprising m cascaded GOA units. An n-th GOA unit includes an output control module, a forward/backward scanning control module, a node signal control module, a second pull-down circuit, a first pull-down circuit and a pull-up circuit. The forward/backward scanning control module control the GOA circuit to perform a forward or a backward scanning. The output control module controls an output of an n-th gate driving signal. The first pull-down circuit comprises a seventh thin film transistor. The second pull-down circuit comprises a fifth thin film transistor. The node signal control module control the fifth thin film transistor. The pull-up circuit includes an eighth thin film transistor. After the LCD panel is powered off, the second global control signal becomes a low level. This invention can eliminate a ghost image in the LCD panel when electricity is powered off, and improve user experience.
-
-
-
-
-
-
-
-
-
Search Results
48
records
(took 0.033 seconds)
