SCAN DRIVING CIRCUIT
    11.
    发明申请
    SCAN DRIVING CIRCUIT 有权
    扫描驱动电路

    公开(公告)号:US20170004796A1

    公开(公告)日:2017-01-05

    申请号:US14779016

    申请日:2015-08-10

    Abstract: A scan driving circuit is provided. The scan driving circuit for driving cascaded scan lines includes a scan driving circuit, a latch module, a driving-signal generation module, an output control module, a high gate voltage source, and a low level gate voltage. The scan driving circuit of the present invention conducts a driving operation for the latch module by a first cascade signal and a second cascade signal, so that a clock signal is not required to be processed with a phase inversion, and thereby the scan driving circuit has less overall power consumption.

    Abstract translation: 提供扫描驱动电路。 用于驱动级联扫描线的扫描驱动电路包括扫描驱动电路,锁存模块,驱动信号生成模块,输出控制模块,高栅极电压源和低电平栅极电压。 本发明的扫描驱动电路通过第一级联信号和第二级联信号对闩锁模块进行驱动操作,使得不需要在相位反转中处理时钟信号,从而扫描驱动电路具有 总体功耗较少

    SCAN DRIVING CIRCUIT
    12.
    发明申请
    SCAN DRIVING CIRCUIT 审中-公开
    扫描驱动电路

    公开(公告)号:US20160358568A1

    公开(公告)日:2016-12-08

    申请号:US14783095

    申请日:2015-08-10

    Abstract: A scan driving circuit is disclosed for executing a driving operation for cascaded scan lines and includes a pull-down control module, a pull-down module, a reset control module, a reset module, a down-stream module, a first bootstrap capacitor, a constant low-level voltage source utilized, and a constant high-level voltage source. The whole structure of the disclosed scan driving circuit is simple, and power consumption is low.

    Abstract translation: 公开了一种用于执行级联扫描线的驱动操作的扫描驱动电路,包括下拉控制模块,下拉模块,复位控制模块,复位模块,下游模块,第一自举电容器, 使用恒定的低电平电压源和恒定的高电平电压源。 所公开的扫描驱动电路的整体结构简单,功耗低。

    DRIVE METHOD FOR DISPLAY PANEL
    15.
    发明申请

    公开(公告)号:US20200251034A1

    公开(公告)日:2020-08-06

    申请号:US16335249

    申请日:2018-12-19

    Abstract: According to a drive method for the display panel, m multiplex signals sequentially generate the high level pulse at the beginning of the (2i−1)th row period in a predetermined order. The high level pulse of the multiplex signal that is the last one to generate the high level pulse in the (2i−1)th row period continues until the end of the (2i−1)th row period. The m multiplex signals sequentially generate the high level pulse at the beginning of the (2i)th row period in a reverse order to the predetermined order. The high level pulse of the multiplex signal that is the last one to generate the high level pulse in the (2i)th row period continues until the end of the 2i row period. As a result, the number of times that the levels of the multiplex signals are changed in a frame period can be decreased to reduce the power consumption.

    DRIVE METHOD FOR DISPLAY PANEL
    16.
    发明申请

    公开(公告)号:US20200168158A1

    公开(公告)日:2020-05-28

    申请号:US16332357

    申请日:2018-12-21

    Abstract: A drive method for a display panel is provided. A first multiplex signal, a second multiplex signal, a third multiplex signal, a fourth multiplex signal, a fifth multiplex signal, and a sixth multiplex signal sequentially generate the high level pulse in the predetermined order in each of the first row periods of the (2i−1)th multiplex period. In addition, the first multiplex signal, the second multiplex signal, the third multiplex signal, the fourth multiplex signal, the fifth multiplex signal, and the sixth multiplex signal sequentially generate the high level pulse in a reverse order to the predetermined order in each of the second row periods of the (2i)th multiplex period. As a result, mura within the display picture of the display panel is eliminated to improve the display quality.

    LIQUID CRYSTAL DRIVING CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE
    18.
    发明申请
    LIQUID CRYSTAL DRIVING CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE 审中-公开
    液晶驱动电路和液晶显示器件

    公开(公告)号:US20160351143A1

    公开(公告)日:2016-12-01

    申请号:US14893519

    申请日:2015-06-30

    Abstract: The present invention discloses a liquid crystal driving circuit, comprising the first to fifth electric switches and the first to fourth capacitors. The first and second capacitors are in the main area, and the third and fourth capacitors are in the sub area. The first to third capacitors are coupled in series. The first and second capacitors, the third and fourth capacitors are respectively coupled in parallel between the first and second electric switches and the common voltage end. The fourth and fifth electric switches are coupled in series between the data end and the second electric switch. The first to fourth electric switches are controlled with the gate control end. The data end is respectively coupled to the first, second and fourth electric switches.

    Abstract translation: 本发明公开了一种液晶驱动电路,包括第一至第五电开关和第一至第四电容器。 第一和第二电容器在主区域中,第三和第四电容器在子区域中。 第一至第三电容器串联耦合。 第一和第二电容器,第三和第四电容器分别并联在第一和第二电开关和公共电压端之间。 第四和第五电开关串联在数据端和第二电开关之间。 第一至第四电开关由门控制端控制。 数据端分别耦合到第一,第二和第四电开关。

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