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公开(公告)号：US11527710B2
公开(公告)日：2022-12-13
申请号：US16529779
申请日：2019-08-01
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Pei-Jou Lee , Kun-Chen Ho , Hsuan-Hsu Chen , Chun-Lung Chen
Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate and a top electrode on the MTJ; forming a first inter-metal dielectric (IMD) layer around the MTJ and the top electrode; forming a stop layer on the first IMD layer; forming a second IMD layer on the stop layer; performing a first etching process to remove the second IMD layer and the stop layer; performing a second etching process to remove part of the top electrode; and forming a metal interconnection to connect to the top electrode.
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公开(公告)号：US20220384254A1
公开(公告)日：2022-12-01
申请号：US17883647
申请日：2022-08-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/532 , H01L23/522
Abstract: A metal interconnect structure includes a first metal interconnection in an inter-metal dielectric (IMD) layer on a substrate, a second metal interconnection on the first metal interconnection, and a cap layer between the first metal interconnection and the second metal interconnection. Preferably, a top surface of the first metal interconnection is even with a top surface of the IMD layer and the cap layer is made of conductive material.
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公开(公告)号：US11450558B2
公开(公告)日：2022-09-20
申请号：US16992055
申请日：2020-08-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
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公开(公告)号：US10910553B1
公开(公告)日：2021-02-02
申请号：US16531129
申请日：2019-08-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Chen-Yi Weng , Chin-Yang Hsieh , Yi-Hui Lee , Ying-Cheng Liu , Yi-An Shih , Jing-Yin Jhang , I-Ming Tseng , Yu-Ping Wang , Chien-Ting Lin , Kun-Chen Ho , Yi-Syun Chou , Chang-Min Li , Yi-Wei Tseng , Yu-Tsung Lai , Jun Xie
Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction stack, wherein the material of top electrode layer is titanium nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
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公开(公告)号：US20200373198A1
公开(公告)日：2020-11-26
申请号：US16992055
申请日：2020-08-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
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Patent Agency Ranking
公开(公告)号：US12206007B2
公开(公告)日：2025-01-21
申请号：US17868753
申请日：2022-07-19
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Wen-Wen Zhang , Kun-Chen Ho , Chun-Lung Chen , Chung-Yi Chiu , Ming-Chou Lu
IPC: H01L29/49 , H01L29/40 , H01L29/417 , H01L29/66 , H01L29/78
Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an interlayer dielectric (ILD) layer on the gate structure, forming a contact hole in the ILD layer adjacent to the gate structure, performing a plasma doping process to form a doped layer in the ILD layer and a source/drain region adjacent to the gate structure, forming a conductive layer in the contact hole, planarizing the conductive layer to form a contact plug, removing the doped layer to form an air gap adjacent to the contact plug, and then forming a stop layer on the ILD layer and the contact plug.
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公开(公告)号：US20230411489A1
公开(公告)日：2023-12-21
申请号：US17868753
申请日：2022-07-19
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Wen-Wen Zhang , Kun-Chen Ho , Chun-Lung Chen , Chung-Yi Chiu , Ming-Chou Lu
IPC: H01L29/49 , H01L29/78 , H01L29/417 , H01L29/66 , H01L29/40
CPC classification number: H01L29/4991 , H01L29/7833 , H01L29/41775 , H01L29/66492 , H01L29/401
Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an interlayer dielectric (ILD) layer on the gate structure, forming a contact hole in the ILD layer adjacent to the gate structure, performing a plasma doping process to form a doped layer in the ILD layer and a source/drain region adjacent to the gate structure, forming a conductive layer in the contact hole, planarizing the conductive layer to form a contact plug, removing the doped layer to form an air gap adjacent to the contact plug, and then forming a stop layer on the ILD layer and the contact plug.
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公开(公告)号：US20220302374A1
公开(公告)日：2022-09-22
申请号：US17835986
申请日：2022-06-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Chen-Yi Weng , Chin-Yang Hsieh , Yi-Hui Lee , Ying-Cheng Liu , Yi-An Shih , Jing-Yin Jhang , I-Ming Tseng , Yu-Ping Wang , Chien-Ting Lin , Kun-Chen Ho , Yi-Syun Chou , Chang-Min Li , Yi-Wei Tseng , Yu-Tsung Lai , JUN XIE
Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, a top electrode layer on the magnetic tunnel junction stack, and a hard mask layer on said top electrode layer, wherein the material of top electrode layer is titanium nitride, a material of said hard mask layer is tantalum or tantalum nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
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公开(公告)号：US20210111334A1
公开(公告)日：2021-04-15
申请号：US17131767
申请日：2020-12-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Chen-Yi Weng , Chin-Yang Hsieh , Yi-Hui Lee , Ying-Cheng Liu , Yi-An Shih , Jing-Yin Jhang , I-Ming Tseng , Yu-Ping Wang , Chien-Ting Lin , Kun-Chen Ho , Yi-Syun Chou , Chang-Min Li , Yi-Wei Tseng , Yu-Tsung Lai , JUN XIE
Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction stack, wherein the material of top electrode layer is titanium nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
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公开(公告)号：US20210020828A1
公开(公告)日：2021-01-21
申请号：US16531129
申请日：2019-08-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Chen-Yi Weng , Chin-Yang Hsieh , Yi-Hui Lee , Ying-Cheng Liu , Yi-An Shih , Jing-Yin Jhang , I-Ming Tseng , Yu-Ping Wang , Chien-Ting Lin , Kun-Chen Ho , Yi-Syun Chou , Chang-Min Li , Yi-Wei Tseng , Yu-Tsung Lai , JUN XIE
Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction stack, wherein the material of top electrode layer is titanium nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
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