公开(公告)号：US10535663B2

公开(公告)日：2020-01-14

申请号：US16245307

申请日：2019-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwon Ma ,  Jun-Noh Lee ,  Dong-Hyun Im ,  Youngseok Kim ,  Kongsoo Lee

IPC: H01L27/108 ,  H01L21/768

Abstract: A method of fabricating a semiconductor device includes forming an interlayer insulating structure on a substrate, forming a contact hole that penetrates the interlayer insulating structure to expose the substrate, forming an amorphous silicon layer including a first portion and a second portion, the first portion covering a top surface of the substrate exposed by the contact hole, the second portion covering a sidewall of the contact hole, providing hydrogen atoms into the amorphous silicon layer, and crystallizing the first portion using the substrate as a seed.

公开(公告)号：US10257332B2

公开(公告)日：2019-04-09

申请号：US15016945

申请日：2016-02-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Manho Kim ,  Hwajoong Jung ,  Youngseok Kim ,  Youngkwon Yoon ,  Kihuk Lee ,  Yonghwan Choi ,  Sunhyoung Pyo

IPC: H05K1/18 ,  H04M1/02 ,  H05K3/34 ,  H05K1/02 ,  H05K3/30

Abstract: An electronic device that includes a circuit board which is arranged between a front cover and a back cover, and includes a conductive pattern inserted into the circuit board. A signal generation or power supply element is electrically connected with the conductive pattern. An adhesion layer is attached onto the circuit board and overlaps at least part of the conductive pattern when viewed from above the circuit board. A first structure is arranged on the adhesion layer and overlaps at least part of the adhesion layer when viewed from above the circuit board. A second structure is arranged on a top of the first structure, overlaps at least part of the first structure when viewed from above the circuit board, and the second structure includes a bottom surface including metal. A metal layer is inserted between the first structure and the bottom surface of the second structure to attach the second structure to the first structure.

公开(公告)号：US11663131B2

公开(公告)日：2023-05-30

申请号：US17374076

申请日：2021-07-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongmin Jo ,  Youngseok Kim ,  Chunghwan You ,  Wooil Kim

IPC: G06F12/08 ,  G06F12/0862 ,  G06F12/10

CPC classification number: G06F12/0862 ,  G06F12/10 ,  G06F2212/68

Abstract: An operating method of a system-on-chip includes outputting a prefetch command in response to an update of mapping information on a first read target address, the update occurring in a first translation lookaside buffer storing first mapping information of a second address with respect to a first address, and storing, in response to the prefetch command, in a second translation lookaside buffer, second mapping information of a third address with respect to at least some second addresses of an address block including a second read target address.

公开(公告)号：US10748909B2

公开(公告)日：2020-08-18

申请号：US16711833

申请日：2019-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwon Ma ,  Jun-Noh Lee ,  Dong-Hyun Im ,  Youngseok Kim ,  Kongsoo Lee

IPC: H01L27/108 ,  H01L21/768 ,  H01L23/485 ,  H01L23/532

Abstract: A method of fabricating a semiconductor device includes forming an interlayer insulating structure on a substrate, forming a contact hole that penetrates the interlayer insulating structure to expose the substrate, forming an amorphous silicon layer including a first portion and a second portion, the first portion covering a top surface of the substrate exposed by the contact hole, the second portion covering a sidewall of the contact hole, providing hydrogen atoms into the amorphous silicon layer, and crystallizing the first portion using the substrate as a seed.

公开(公告)号：US09543202B2

公开(公告)日：2017-01-10

申请号：US15060641

申请日：2016-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jamin Koo ,  Youngseok Kim ,  Kongsoo Lee ,  Goeun Bae

IPC: H01L21/44 ,  H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L21/28

CPC classification number: H01L21/76895 ,  H01L21/28035 ,  H01L21/288 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/53271 ,  H01L27/10888

Abstract: Provided is a method of fabricating a semiconductor device, the method including forming interconnection structures extending parallel to each other on a substrate; performing a coating process and forming a liquid state silicon source material layer filling an area between the interconnection structures; performing a first annealing process, curing the liquid state silicon source material layer, and forming an amorphous silicon layer; and crystallizing the amorphous silicon layer and forming contact plugs.

Abstract translation: 提供一种制造半导体器件的方法，该方法包括在衬底上形成彼此平行延伸的互连结构; 执行涂覆工艺并形成填充所述互连结构之间的区域的液态硅源材料层; 进行第一退火处理，固化液态硅源材料层，形成非晶硅层; 并使非晶硅层结晶并形成接触塞。