公开(公告)号：US20230359495A1

公开(公告)日：2023-11-09

申请号：US18304267

申请日：2023-04-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rekha PITCHUMANI ,  Yang Seok KI

IPC: G06F9/50

CPC classification number: G06F9/5016

Abstract: A system and method for heterogeneous memory. In some embodiments, the method includes: receiving, from a first application, a first request for memory; providing a first allocation of memory to the first application; receiving, from a second application, a second request for memory; and providing a second allocation of memory to the second application, the providing of the first allocation including providing, based on a first requirement, of the first application, the first allocation from a first group of memory; the providing of the second allocation including providing, based on a second requirement, of the second application, the second allocation from a second group of memory; the second group of memory having an attribute differing from a corresponding attribute of the first group of memory; and the first requirement being different from the second requirement.

公开(公告)号：US20230185661A1

公开(公告)日：2023-06-15

申请号：US18106474

申请日：2023-02-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rekha PITCHUMANI ,  Zongwang LI

IPC: G06F11/10 ,  G06F11/14 ,  G06F11/07

CPC classification number: G06F11/1044 ,  G06F11/1471 ,  G06F11/076 ,  G06F11/1451 ,  G06F11/1469

Abstract: A storage device is disclosed. The storage device may include storage for data. A controller may manage writing the data to the storage and reading the data from the storage. A data quality metric table may map a first number of errors to a first data quality metric and map a second number of errors to a second data quality metric. A transmitter may return the data quality metric table to a host.

公开(公告)号：US20230082394A1

公开(公告)日：2023-03-16

申请号：US17991761

申请日：2022-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rekha PITCHUMANI ,  Yang Seok KI

IPC: G06F3/06 ,  G06F13/16

Abstract: A message queue storage device includes: a non-volatile flash memory unit including one or more flash memory dies including one or more pages grouped into one or more flash blocks; a volatile memory; a data port; and a storage controller configured to: receive, via the data port, a message write command including a message and a queue identifier; identify a queue from one or more queues based on the queue identifier; determine that the message is a persistent message; select a write physical location in one or more pages of the flash memory dies in which to store the message; and store the message associated with the queue at the write physical location in the one or more pages of the non-volatile flash memory unit.

公开(公告)号：US20220326852A1

公开(公告)日：2022-10-13

申请号：US17850984

申请日：2022-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rekha PITCHUMANI ,  Yang Seok KI

IPC: G06F3/06 ,  G06F11/14 ,  G06F11/20

Abstract: A method for storing data may include receiving user data at a group of storage devices, wherein the storage devices are interconnected, erasure coding the user data into redundancy blocks at the group of storage devices, and storing the redundancy blocks on at least two of the storage devices. The erasure encoding may be distributed among at least two of the storage devices. The redundancy blocks may be arranged in reliability groups. The redundancy blocks may be grouped by the storage devices independently of the partitioning of the user data by the user. The method may further include recovering data based on redundancy blocks. A storage device may include a storage medium, a network interface configured to communicate with one or more other storage devices, and a storage processing unit configured to erasure code user data into redundancy blocks cooperatively with the one or more other storage devices.

公开(公告)号：US20220103187A1

公开(公告)日：2022-03-31

申请号：US17204936

申请日：2021-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Linfang WANG ,  Rekha PITCHUMANI ,  Zongwang LI

IPC: H03M13/11 ,  H03M13/00

Abstract: A device is disclosed. The device may include an input buffer to receive a first low bit width message. A reconstruction circuit may implement a reconstruction function on the first low bit width message, producing a first high bit width message. A computation circuit may implementing a computation function on the first high bit width message, producing a second high bit width message. A quantization circuit may implementing a quantization function on the second high bit width message, producing a second low bit width message. A decision buffer may then store the second low bit width message. The reconstruction function and the quantization function may vary depending on an iteration and a layer of the device.

公开(公告)号：US20200349006A1

公开(公告)日：2020-11-05

申请号：US16932679

申请日：2020-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rekha PITCHUMANI ,  Yang Seok KI

IPC: G06F11/10 ,  G06F3/06

Abstract: According to one general aspect, an apparatus may include a regeneration-code-aware (RCA) storage device configured to calculate at least one type of data regeneration code for data error correction. The RCA storage device may include a memory configured to store data in chunks which, in turn, comprise data blocks. The RCA storage device may include a processor configured to compute, when requested by an external host device, a data regeneration code based upon a selected number of data blocks. The RCA storage device may include an external interface configured to transmit the data regeneration code to the external host device.

公开(公告)号：US20240385780A1

公开(公告)日：2024-11-21

申请号：US18788107

申请日：2024-07-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yang Seok KI ,  Rekha PITCHUMANI

IPC: G06F3/06 ,  G06F11/10

Abstract: A Solid State Drive (SSD) is disclosed. The SSD may include an interface to receive read and write requests from an application on a host. Storage, including at least one chip, may store data. An SSD controller may process the read and write requests from the application. A configuration module may configure the SSD. Storage may include a reliability table which may include entries specifying configurations of the SSD and reliabilities for those configurations.

公开(公告)号：US20240111458A1

公开(公告)日：2024-04-04

申请号：US18530035

申请日：2023-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jing YANG ,  Jingpei YANG ,  Rekha PITCHUMANI

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/0658 ,  G06F3/0679

Abstract: A multi-stream memory system includes an in-device data processor including a first data processing engine and a second data processing engine, a controller processor, and a processor memory coupled to the controller processor, wherein the processor memory has stored thereon instructions that, when executed by the controller processor, cause the controller processor to perform: identifying a stream ID of an input stream, identifying the first data processing engine as being associated with the stream ID based on a stream assignment table, and applying the first data processing engine to the input stream to generate processed data.

公开(公告)号：US20230409483A1

公开(公告)日：2023-12-21

申请号：US17817640

申请日：2022-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sudarsun KANNAN ,  Yujie REN ,  Rekha PITCHUMANI

IPC: G06F12/0891 ,  G06F3/06

CPC classification number: G06F12/0891 ,  G06F3/0655 ,  G06F3/0604 ,  G06F3/0673 ,  G06F2212/70 ,  G06F2212/60

Abstract: A system and method for caching in storage devices. In some embodiments, the method includes: opening a first file, by a first thread; reading a first page of data, from the first file, into a page cache in host memory of a host; adding, to a first data structure, a first pointer, the first pointer pointing to the first page of data; opening a second file, by a second thread; reading a second page of data, from the second file, into the page cache; and adding, to the first data structure, a second pointer, the second pointer pointing to the second page of data.

公开(公告)号：US20230409196A1

公开(公告)日：2023-12-21

申请号：US17885520

申请日：2022-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tong ZHANG ,  Heekwon PARK ,  Rekha PITCHUMANI ,  Yang Seok KI

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/064 ,  G06F3/0689

Abstract: A system is disclosed. The system may include a processor that may issue a byte level protocol request including a byte address. The system may also include a first storage device and a second storage device. The first storage device and the second storage device may support a cache coherent interconnect protocol, the cache coherent interconnect protocol including a block level protocol and a byte level protocol. The first storage device and the second storage device are included in a redundant array of independent disks (RAID). The first storage device may include a first address range, and the second storage device may include a second address range. The second storage device may provide a RAID address range associated with the first address range and the second address range. A decoder associated with the second storage device may be configured to receive the request from the processor. The decoder may determine that the byte address in the RAID address range is associated with a target address range.