公开(公告)号：US11593031B2

公开(公告)日：2023-02-28

申请号：US17375328

申请日：2021-07-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myungsub Shin ,  Sungho Seo ,  Seongyong Jang ,  Haesung Jung

IPC: G06F3/06

Abstract: An electronic device may include a host device and a storage device which are connected in a universal flash storage standard, wherein the host device may include processing circuitry configured to process a submission queue (SQ) and a completion queue (CQ), wherein the SQ is a processing standby line of a command, and the CQ is a processing standby line of a response received from the storage device, transmit the command to the storage device, store a host command credit in a host command register, the host command credit indicating an estimated command accommodation limit of the storage device, store the response in a response slot, and store a host response credit in a host command register, the host command credit indicating a limit of the response slot.

公开(公告)号：US11561571B2

公开(公告)日：2023-01-24

申请号：US17179830

申请日：2021-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanwoo Noh ,  Sungho Seo ,  Yongwoo Jeong ,  Dongwoo Nam ,  Myungsub Shin ,  Hyunkyu Jang

IPC: G06F1/08 ,  G06F3/06 ,  G11C7/22 ,  G11C16/32 ,  G06F1/04 ,  G06F13/42 ,  H04L7/00

Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.