公开(公告)号：US10749030B2

公开(公告)日：2020-08-18

申请号：US16018121

申请日：2018-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soojin Jeong ,  Dong Il Bae ,  Geumjong Bae ,  Seungmin Song ,  Junggil Yang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092 ,  H01L29/08 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/06

Abstract: A semiconductor device may include first and second channel patterns on a substrate, first and second source/drain patterns in contact respectively with the first and second channel patterns, and first and second gate electrodes respectively overlapping the first and second channel patterns. The first gate electrode may include a first segment between first and second semiconductor patterns of the first channel pattern. The first segment may include a first convex portion protruding toward the first source/drain pattern. The second gate electrode may include a second segment between third and fourth semiconductor patterns of the second channel pattern. The second segment may include a concave portion recessed toward a center of the second segment.

公开(公告)号：US10090328B2

公开(公告)日：2018-10-02

申请号：US15429719

申请日：2017-02-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junggil Yang ,  Dong Il Bae ,  Geumjong Bae ,  Seungmin Song ,  Jongho Lee

IPC: H01L23/48 ,  H01L27/12 ,  H01L27/02 ,  H01L29/78

Abstract: A semiconductor device includes an insulating layer on a substrate, a first channel pattern on the insulating layer and contacting the insulating layer, second channel patterns on the first channel pattern and being horizontally spaced apart from each other, a gate pattern on the insulating layer and surrounding the second channel patterns, and a source/drain pattern between the second channel patterns.

公开(公告)号：US09362397B2

公开(公告)日：2016-06-07

申请号：US14464785

申请日：2014-08-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Gi Hur ,  Sangsu Kim ,  Junggil Yang ,  Changjae Yang ,  Dongkyu Lee

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/12

CPC classification number: H01L29/7832 ,  H01L27/1104 ,  H01L29/12 ,  H01L29/66484 ,  H01L29/66787 ,  H01L29/7831

Abstract: A gate-all-around (GAA) semiconductor device can include a fin structure that includes alternatingly layered first and second semiconductor patterns. A source region can extend into the alternatingly layered first and second semiconductor patterns and a drain region can extend into the alternatingly layered first and second semiconductor patterns. A gate electrode can extend between the source region and the drain region and surround channel portions of the second semiconductor patterns between the source region and the drain region to define gaps between the source and drain regions. A semiconductor oxide can be on first side walls of the gap that face the source and drain regions and can be absent from at least one of second side walls of the gaps that face the second semiconductor patterns. A gate insulating layer can be on the first side walls of the gaps between the gate electrode and the semiconductor oxide.

Abstract translation: 栅极全能（GAA）半导体器件可以包括鳍结构，其包括交替分层的第一和第二半导体图案。 源极区域可以延伸到交替层叠的第一和第二半导体图案中，并且漏极区域可以延伸到交替层叠的第一和第二半导体图案中。 栅电极可以在源极区域和漏极区域之间延伸并且围绕源极区域和漏极区域之间的第二半导体图案的通道部分，以限定源极和漏极区域之间的间隙。 半导体氧化物可以位于与源极和漏极区域相对的间隙的第一侧壁上，并且可以不存在面对第二半导体图案的间隙的第二侧壁中的至少一个。 栅极绝缘层可以位于栅电极和半导体氧化物之间的间隙的第一侧壁上。

公开(公告)号：US20150084041A1

公开(公告)日：2015-03-26

申请号：US14464785

申请日：2014-08-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Gi Hur ,  Sangsu Kim ,  Junggil Yang ,  Changjae Yang ,  Dongkyu Lee

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/12

CPC classification number: H01L29/7832 ,  H01L27/1104 ,  H01L29/12 ,  H01L29/66484 ,  H01L29/66787 ,  H01L29/7831

Abstract: A gate-all-around (GAA) semiconductor device can include a fin structure that includes alternatingly layered first and second semiconductor patterns. A source region can extend into the alternatingly layered first and second semiconductor patterns and a drain region can extend into the alternatingly layered first and second semiconductor patterns. A gate electrode can extend between the source region and the drain region and surround channel portions of the second semiconductor patterns between the source region and the drain region to define gaps between the source and drain regions. A semiconductor oxide can be on first side walls of the gap that face the source and drain regions and can be absent from at least one of second side walls of the gaps that face the second semiconductor patterns. A gate insulating layer can be on the first side walls of the gaps between the gate electrode and the semiconductor oxide.

Abstract translation: 栅极全能（GAA）半导体器件可以包括鳍结构，其包括交替分层的第一和第二半导体图案。 源极区域可以延伸到交替层叠的第一和第二半导体图案中，并且漏极区域可以延伸到交替层叠的第一和第二半导体图案中。 栅电极可以在源极区域和漏极区域之间延伸并且围绕源极区域和漏极区域之间的第二半导体图案的通道部分，以限定源极和漏极区域之间的间隙。 半导体氧化物可以位于与源极和漏极区域相对的间隙的第一侧壁上，并且可以不存在面对第二半导体图案的间隙的第二侧壁中的至少一个。 栅极绝缘层可以位于栅电极和半导体氧化物之间的间隙的第一侧壁上。

公开(公告)号：US20250089299A1

公开(公告)日：2025-03-13

申请号：US18960679

申请日：2024-11-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junbeom Park ,  Sangsu Kim ,  Junggil Yang

IPC: H01L29/423 ,  H01L29/417

Abstract: A semiconductor device includes a first source/drain structure having a first length in a horizontal direction, as viewed in a planar cross-sectional view, the horizontal direction being perpendicular to a vertical direction, a second source/drain structure having a second length in the horizontal direction, as viewed in the planar cross-sectional view, the second length being less than the first length, channels extending between the first source/drain structure and the second source/drain structure, the channels being spaced apart from each other in the vertical direction, at least one sacrificial pattern between adjacent ones of the channels, and a trench penetrating the channels and the at least one sacrificial pattern.

公开(公告)号：US12211942B2

公开(公告)日：2025-01-28

申请号：US17398504

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soojin Jeong ,  Myunggil Kang ,  Junggil Yang ,  Junbeom Park

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device includes a first source/drain, a second source/drain isolated from direct contact with the first source/drain in a horizontal direction, a channel extending between the first source/drain and the second source/drain, a gate surrounding the channel, an upper inner spacer between the gate and the first source/drain and above the channel, and a lower inner spacer between the gate and the first source/drain and under the channel, in which the channel includes a base portion extending between the first source/drain and the second source/drain, an upper protrusion portion protruding upward from a top surface of the base portion, and a lower protrusion portion protruding downward from a bottom surface of the base portion, and a direction in which a top end of the upper protrusion portion is isolated from direct contact with a bottom end of the lower protrusion portion is oblique with respect to a vertical direction.

公开(公告)号：US11211495B2

公开(公告)日：2021-12-28

申请号：US16922464

申请日：2020-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soojin Jeong ,  Dong Il Bae ,  Geumjong Bae ,  Seungmin Song ,  Junggil Yang

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092 ,  H01L29/08 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/06

Abstract: A semiconductor device may include first and second channel patterns on a substrate, first and second source/drain patterns in contact respectively with the first and second channel patterns, and first and second gate electrodes respectively overlapping the first and second channel patterns. The first gate electrode may include a first segment between first and second semiconductor patterns of the first channel pattern. The first segment may include a first convex portion protruding toward the first source/drain pattern. The second gate electrode may include a second segment between third and fourth semiconductor patterns of the second channel pattern. The second segment may include a concave portion recessed toward a center of the second segment.

公开(公告)号：US20210273105A1

公开(公告)日：2021-09-02

申请号：US17320617

申请日：2021-05-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungmin Song ,  Bongseok Suh ,  Junggil Yang ,  Soojin Jeong

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423

Abstract: An integrated circuit includes a fin active region protruding from a substrate, a plurality of semiconductor patterns on an upper surface of the fin active region, a gate electrode that surrounds the plurality of semiconductor patterns and includes a main gate part on an uppermost one of the plurality of semiconductor patterns and sub gate parts between the plurality of semiconductor patterns, a spacer structure on a sidewall of the main gate part, and a source/drain region at a side of the gate electrode. The source/drain region is connected to the plurality of semiconductor patterns and contacts a bottom surface of the spacer structure. A top portion of the uppermost semiconductor pattern has a first width. A bottom portion of the uppermost semiconductor pattern has a second width smaller than the first width.

公开(公告)号：US10916658B2

公开(公告)日：2021-02-09

申请号：US16894270

申请日：2020-06-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggil Yang ,  Seungmin Song ,  Geumjong Bae ,  Dong Il Bae

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/417 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device includes a channel pattern including a first semiconductor pattern and a second semiconductor pattern, which are sequentially stacked on a substrate, and a gate electrode that extends in a first direction and crosses the channel pattern. The gate electrode includes a first portion interposed between the substrate and the first semiconductor pattern and a second portion interposed between the first and second semiconductor patterns. A maximum width in a second direction of the first portion is greater than a maximum width in the second direction of the second portion, and a maximum length in the second direction of the second semiconductor pattern is less than a maximum length in the second direction of the first semiconductor pattern.

公开(公告)号：US10714617B2

公开(公告)日：2020-07-14

申请号：US16011785

申请日：2018-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junggil Yang ,  Seungmin Song ,  Geumjong Bae ,  Dong Il Bae

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/417 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device includes a channel pattern including a first semiconductor pattern and a second semiconductor pattern, which are sequentially stacked on a substrate, and a gate electrode that extends in a first direction and crosses the channel pattern. The gate electrode includes a first portion interposed between the substrate and the first semiconductor pattern and a second portion interposed between the first and second semiconductor patterns. A maximum width in a second direction of the first portion is greater than a maximum width in the second direction of the second portion, and a maximum length in the second direction of the second semiconductor pattern is less than a maximum length in the second direction of the first semiconductor pattern.