Abstract:
A flexible organic light-emitting display device may include: a first polymer layer; a first transparent conductive layer over the first polymer layer; a first inorganic layer over the first transparent conductive layer; and a plurality of pixels on the first inorganic layer and each including an organic light-emitting diode, and a driver configured to drive the organic light-emitting diode.
Abstract:
An organic light-emitting diode (OLED) display having thin film transistors (TFTs) is disclosed. In one aspect, TFTs of the OLED display include a substrate and a first semiconductor layer formed over the substrate and including first channel, source, and drain regions and a lightly doped region between the first channel region and the first source and drain regions. The OLED display also includes a second semiconductor layer formed over the substrate and including second channel, source, and drain regions. The OLED display further includes first and second gate electrodes formed over the first semiconductor layer and a third gate electrode formed over the second semiconductor layer. The width of the second gate electrode is less than that of the first gate electrode and the lightly doped region overlaps a portion of the first gate electrode and does not overlap the second gate electrode.
Abstract:
A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.
Abstract:
A liquid crystal display (LCD) device, comprising: a substrate, gate wiring including a gate line that is disposed on the substrate to extend in a first direction and a gate electrode that is connected to the gate line, a data conductor disposed on the gate wiring and including a data line that extends in a second direction different from the first direction, and a first electrode that overlaps the gate electrode, a common electrode disposed on the data conductor and including a first opening that partially exposes the first electrode therethrough, an opaque conductive pattern disposed on the common electrode; and a pixel electrode disposed on the opaque conductive pattern and electrically connected to the first electrode exposed through the first opening.
Abstract:
A display device includes a substrate including a display area and a non-display area outside the display area, a plurality of pixels located in the display area, a driving circuit driving the pixels, and a pad portion located in the non-display area and electrically connected to the driving circuit through a plurality of outer wirings. The pad portion includes a plurality of pad wirings each electrically connected to corresponding ones of the outer wirings. The pad wirings includes a first pad wiring and a second pad wiring separated from each other. The first pad wiring includes a first electrode layer, an insulating layer on the first electrode, and a second electrode layer on the insulating layer in a stacking direction, the second electrode layer being connected to the first electrode layer. The second pad wiring includes the first electrode layer but not the second electrode layer.
Abstract:
A liquid crystal display device is provided. The liquid crystal display device of the disclosure includes: a first substrate and a second substrate facing each other; a liquid crystal layer interposed between the first substrate and the second substrate; a column spacer disposed on the first substrate and maintaining a gap between the first substrate and the second substrate; a light blocking pattern disposed on the first substrate and including an extended portion formed around the column spacer; and light blocking metal overlapped with at least a part of a region adjacent to and outside of a boundary of the extended portion that is not parallel to an alignment direction of liquid crystal molecules.
Abstract:
An organic light-emitting diode (OLED) display having thin film transistors (TFTs) is disclosed. In one aspect, TFTs of the OLED display include a substrate and a first semiconductor layer formed over the substrate and including first channel, source, and drain regions and a lightly doped region between the first channel region and the first source and drain regions. The OLED display also includes a second semiconductor layer formed over the substrate and including second channel, source, and drain regions. The OLED display further includes first and second gate electrodes formed over the first semiconductor layer and a third gate electrode formed over the second semiconductor layer. The width of the second gate electrode is less than that of the first gate electrode and the lightly doped region overlaps a portion of the first gate electrode and does not overlap the second gate electrode.
Abstract:
Provided is a liquid crystal display including: a first substrate; a thin film transistor disposed on the first substrate; a passivation layer disposed on the thin film transistor and comprising a contact hole exposing an electrode of the thin film transistor; a pixel electrode disposed on the passivation layer and connected to the electrode of the thin film transistor through the contact hole; a lower buffer layer disposed on the pixel electrode; a lower alignment layer disposed on the lower buffer layer; a second substrate facing the first substrate; a common electrode disposed on the second substrate; an upper buffer layer disposed on the common electrode; and an upper alignment layer disposed on the upper buffer layer, in which the lower buffer layer comprises parylene, the upper buffer layer comprises parylene, or both the lower and the upper buffer layers comprise parylene.
Abstract:
A display device includes: a base substrate including an active area, and a non-active area including a crack dam arrangement area; a plurality of inorganic layers on the base substrate; and an encapsulation layer on the plurality of inorganic layers, and including an encapsulation inorganic layer, and an encapsulation organic layer on the encapsulation inorganic layer. The base substrate includes first substrate portions having a first thickness at the crack dam arrangement area, and a second substrate portion between adjacent ones of the first substrate portions and connected to the first substrate portions, the second substrate portion having a second thickness smaller than the first thickness. The plurality of inorganic layers are laminated to form an inorganic laminated film at the crack dam arrangement area; and the encapsulation inorganic layer is located over the first substrate portions and the second substrate portion, and includes at least one short circuit portion.
Abstract:
A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.