Abstract:
There is provided a pixel, including an organic light emitting diode (OLED), a first transistor whose gate electrode is coupled to a first node, whose first electrode is coupled to a first power supply via a third node, and whose second electrode is coupled to an anode electrode of the OLED, a second transistor coupled between a data line and a second node and turned on when a scan signal is supplied to a scan line, a first capacitor coupled between the second node and a first voltage source, a third transistor coupled between the second node and the first node and turned on when a second control signal is supplied, and a fourth transistor coupled between the first node and the first power supply and turned on when a first control signal is supplied.
Abstract:
A scan driving unit and OLED display device including the unit are disclosed. In one aspect, the unit includes a first pre-decoder block that receives upper scan-line selection signals for selecting one of upper scan-lines that are arranged in an upper display region of a display panel, and outputs first logic signals based on the upper scan-line selection signals. It also includes a second pre-decoder block that receives lower scan-line selection signals for selecting one of lower scan-lines that are arranged in a lower display region of the display panel, and outputs second logic signals based on the lower scan-line selection signals. It further includes a first final-decoder block coupled between the upper display region and the first pre-decoder block that selects one of the upper scan-lines based on the first logic signals, and a second final-decoder block coupled between the lower display region and the second pre-decoder block that selects one of the lower scan-lines based on the second logic signals.
Abstract:
A pixel circuit for an organic light emitting diode (OLED) display is disclosed. One inventive aspect includes an organic light emitting diode, a first transistor, a second transistor, a first capacitor connected to a second node and a fixed voltage source, a third transistor, a fourth transistor, a second capacitor connected to the fourth transistor and a third node, a first control transistor and a second control transistor. The fourth transistor is connected to the first and third nodes and is turned off when an emission control signal is supplied to an emission control line and turned on otherwise. The first control transistor is connected to the third node and the first power source and is turned on when a first control signal is supplied.
Abstract:
A stage includes an output unit configured to supply a scan signal to an output terminal according to voltages of first and second nodes; a first driver configured to control the voltages of the first and second nodes so that when a start signal or an output signal of a previous stage is supplied to a first input terminal, the scan signal is supplied from the output unit; and a second driver configured to control the voltages of the first and second nodes, corresponding to signals supplied to a second input terminal, a fourth input terminal and a fifth input terminal, wherein the second driver comprises eighth and ninth transistors coupled in series between the output terminal and the second node, and wherein a gate electrode of the eighth transistor is coupled to the first node, and a gate electrode of the ninth transistor is coupled to the fourth input terminal.
Abstract:
A method of driving an OLED display includes: during a scanning period of a first frame, turning off a relay transistor and turning on a switching transistor to enable a second data voltage applied to a data line to be stored in a first capacitor; and during a light emitting period of the first frame, performing an operation to turn on a light emitting transistor and a compensation transistor to enable a voltage into which a first data voltage and a threshold voltage of a driving transistor are reflected to be applied to a second node for enabling the OLED to emit light by a driving current which flows into a driving transistor. The scanning period and the light emitting period temporally overlap each other.
Abstract:
A stereoscopic image display device includes a display panel including a plurality of pixels, a scan driver, a gate driver, a data driver, and a controller, and a sub-frame includes a first period during which a data voltage according to an image data signal emitted in the previous sub-frame is initialized, a second period during which a data voltage according to the image data signal written in the previous sub-frame is transmitted and a threshold voltage of a driving transistor of each pixel is compensated, a third period during which a data voltage according to a next sub-frame's data signal is sequentially written to the respective pixels, and a fourth period that is concurrent with and equal to or longer than the third period and during which the respective pixels concurrently emit light corresponding to the data voltage according to the image data signal written in the previous sub-frame.
Abstract:
An emissive display device includes a polycrystalline semiconductor including a channel, source region, and drain region of a driving transistor disposed on a substrate. The device includes a gate electrode of the driving transistor overlapping the channel of the driving transistor, an oxide semiconductor including a channel, a source region, and a drain region of a second transistor disposed on the substrate, and a first connection electrode. The first connection electrode includes a first connector electrically connected to the gate electrode of the driving transistor, a second connector electrically connected to a second electrode of the second transistor, and a main body disposed between the first connector and the second connector. The device includes an initialization voltage line disposed on the substrate and applying an initialization voltage. The initialization voltage line surrounds at least a part of the second connector of the first connection electrode.
Abstract:
A stage includes an output unit configured to supply a scan signal to an output terminal according to voltages of first and second nodes; a first driver configured to control the voltages of the first and second nodes so that when a start signal or an output signal of a previous stage is supplied to a first input terminal, the scan signal is supplied from the output unit; and a second driver configured to control the voltages of the first and second nodes, corresponding to signals supplied to a second input terminal, a fourth input terminal and a fifth input terminal, wherein the second driver comprises eighth and ninth transistors coupled in series between the output terminal and the second node, and wherein a gate electrode of the eighth transistor is coupled to the first node, and a gate electrode of the ninth transistor is coupled to the fourth input terminal.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract:
A scanline driver includes a shift register circuit and an output buffer. The shift register circuit provides a register output signal and a plurality of signals based on a scan input signal and a plurality of clock signals. The shift register circuit is arranged at at least one horizontal side of a pixel circuit region and includes a plurality of unit pixel circuits connected to a scanline. The output buffer provides a scanline enable signal to the scanline based on the register output signal and the plurality of signals. The output buffer is arranged at at least one vertical side of the pixel circuit region in a pixel array.