公开(公告)号：US11221965B2

公开(公告)日：2022-01-11

申请号：US16287778

申请日：2019-02-27

Applicant: SK hynix Inc.

Inventor： Seung-Gyu Jeong ,  Dong-Gun Kim ,  Jung-Hyun Kwon ,  Young-Suk Moon

IPC: G06F12/123 ,  G06F12/0868 ,  G06F12/127

Abstract: In a cache memory used for communication between a host and a memory, the cache memory may include a plurality of cache sets, each comprising: a valid bit; N dirty bits; a tag; and N data sets respectively corresponding to the N dirty bits and each including data of a data chunk size substantially identical to a data chunk size of the host, wherein a data chunk size of the memory is N times as large as the data chunk size of the host, where N is an integer greater than or equal to 2.

公开(公告)号：US09996292B2

公开(公告)日：2018-06-12

申请号：US15192786

申请日：2016-06-24

Applicant: SK hynix Inc.

Inventor： Dong-Gun Kim ,  Jung-Hyun Kwon

IPC: G06F3/06

CPC classification number: G06F3/0629 ,  G06F3/0604 ,  G06F3/0611 ,  G06F3/0647 ,  G06F3/0649 ,  G06F3/0679

Abstract: A memory system includes: a non-volatile memory device including a normal region in which Most Significant Bits (MSBs) and Least Significant Bits (LSBs) stored in memory cells are accessed simultaneously, a hot region in which MSBs stored in memory cells are accessed, and a cold region in which LSBs stored in memory cells are accessed; and a memory controller controlling the non-volatile memory device, Herein, the memory controller includes: a read/write counter that counts the number of read operations and the number of write operations that are performed for each of logical cluster to thereby produce a counting result; and a region selector that maps each logical cluster to one among the normal region, the hot region and the cold region based on the counting result to thereby produce mapping data.

公开(公告)号：US09886197B2

公开(公告)日：2018-02-06

申请号：US15353844

申请日：2016-11-17

Applicant: SK hynix Inc.

Inventor： Dong-Gun Kim

IPC: G06F3/06 ,  G11C16/10 ,  G11C16/26 ,  G11C16/16 ,  G11C16/04

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26

Abstract: A method for operating a memory system includes detecting a size of a data requested by a host, generating a first data that represents the size of the requested data and a second data that represents a remaining empty space other than a space for the requested data in a first region having a unit size of data storage in a memory device when the size of the requested data is smaller than the first region and the request is to write the requested data into the memory device, and storing the first data and the second data in the memory device along with the requested data.

公开(公告)号：US09594525B2

公开(公告)日：2017-03-14

申请号：US14505042

申请日：2014-10-02

Applicant: SK hynix Inc.

Inventor： Dong-Gun Kim ,  Yong-Kee Kwon ,  Hong-Sik Kim

IPC: G06F15/17 ,  G06F3/038 ,  G06F13/20 ,  G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0679 ,  G06F3/061 ,  G06F3/0652 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/1024 ,  G06F2212/7205 ,  G06F2212/7208

Abstract: A data storage device may include: a data storage unit comprising a plurality of channels each having a plurality of nonvolatile memory devices; and a control unit configured to control a garbage collection operation of selecting a first block included in a first channel as a victim block and copying first data included in the first block into a second block included in a second channel that is selected.

Abstract translation: 数据存储装置可以包括：数据存储单元，包括多个通道，每个通道具有多个非易失性存储器件; 以及控制单元，被配置为控制选择包括在第一通道中的第一块的垃圾回收操作作为受害块，并将包括在第一块中的第一数据复制到包括在所选择的第二通道中的第二块中。