SEMICONDUCTOR VARIABLE CAPACITOR USING THRESHOLD IMPLANT REGION

    公开(公告)号:US20180315864A1

    公开(公告)日:2018-11-01

    申请号:US15583289

    申请日:2017-05-01

    Abstract: Certain aspects of the present disclosure generally relate to a semiconductor variable capacitor, and techniques for fabricating the same, implemented using a threshold voltage implant region. For example, the semiconductor variable capacitor generally includes a first non-insulative region disposed above a first semiconductor region, a second non-insulative region disposed above the first semiconductor region, and a threshold voltage (Vt) implant region interposed between the first non-insulative region and the first semiconductor region and disposed adjacent to the second non-insulative region. In certain aspects, the semiconductor variable capacitor also includes a control region disposed above the first semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.

    VARIABLE CAPACITOR BASED ON BURIED OXIDE PROCESS

    公开(公告)号:US20180062001A1

    公开(公告)日:2018-03-01

    申请号:US15250493

    申请日:2016-08-29

    Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor based on a buried oxide process. The semiconductor variable capacitor generally includes a first conductive pad coupled to a first non-insulative region and a second conductive pad coupled to a second non-insulative region. The second non-insulative region may be coupled to a semiconductor region. The capacitor may also include a first control region coupled to the first semiconductor region such that a capacitance between the first conductive pad and the second conductive pad is configured to be adjusted by varying a control voltage applied to the first control region. The capacitor also includes an insulator region disposed below the semiconductor region, wherein at least a portion of the first non-insulative region is separated from the second non-insulative region by the insulator region such that the first conductive pad is electrically isolated from the second conductive pad.

    VARIABLE CAPACITOR FLAT-BAND VOLTAGE ENGINEERING

    公开(公告)号:US20190221677A1

    公开(公告)日:2019-07-18

    申请号:US15871638

    申请日:2018-01-15

    Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.

    LAYOUT TECHNIQUES FOR TRANSCAP AREA OPTIMIZATION

    公开(公告)号:US20180233603A1

    公开(公告)日:2018-08-16

    申请号:US15431109

    申请日:2017-02-13

    Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a semiconductor region, an insulative layer disposed above the semiconductor region, and a first non-insulative region disposed above the insulative layer. In certain aspects, a second non-insulative region is disposed adjacent to the semiconductor region, and a control region is disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region. In certain aspects, the first non-insulative region is disposed above a first portion of the semiconductor region and a second portion of the semiconductor region, and the first portion and the second portion of the semiconductor region are disposed adjacent to a first side and a second side, respectively, of the control region or the second non-insulative region.

    HIGH FREQUENCY MULTI-LEVEL RECTIFICATION

    公开(公告)号:US20170256958A1

    公开(公告)日:2017-09-07

    申请号:US15061759

    申请日:2016-03-04

    Abstract: A multi-level rectifier is presented that is suitable for use at high frequencies, including into MHz range such as in the 6.78 MHz band used for wireless power transfer. To maintain the proper timing or switching waveform when operating at high frequencies, a feedback loop is used. The rectification circuit includes a multi-level waveform generator circuit that generates a multi-level control waveform from the input waveform and an indication of its current. The multi-level control waveform is maintained in phase with the input waveform. A control signal generation circuit receives the multi-level control waveform and generates control signals corresponding to levels of the multi-level control waveform. A synchronous rectifier receives the input waveform and includes a plurality of switches to provide an output voltage generated from the input waveform. The switches are coupled to receive the control signals and the output voltage is a function of the multi-level control waveform.

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