公开(公告)号：US20190305971A1

公开(公告)日：2019-10-03

申请号：US15944089

申请日：2018-04-03

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Xiao Lu ,  Seung Hyuk Kang

IPC: H04L9/32 ,  G11C11/419 ,  G11C7/12

Abstract: Physically unclonable function (PUF) memory employing static random access memory (SRAM) bit cells enhanced by stress for increased PUF output reproducibility. Stress voltage applied to SRAM bit cells enhances their skew so that the SRAM bit cells output their preferred initial state in subsequent PUF read operations regardless of process variation and other external environmental variations, such as temperature. The application of stress voltage on the SRAM bit cells in a PUF memory array takes advantage of the recognition of aging effect in transistors, where turning transistors on and off over time can increase threshold voltage resulting in lower drive current. Stress voltage can be applied to the SRAM bit cells to bias their threshold voltage to simulate this aging effect to enhance mismatch between transistors in the SRAM bit cell to more fully skew the SRAM bit cells for increased PUF output reproducibility with less susceptible to noise.

公开(公告)号：US09876123B2

公开(公告)日：2018-01-23

申请号：US14495507

申请日：2014-09-24

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Jeffrey Junhao Xu ,  Xiao Lu ,  Bin Yang ,  Jun Yuan ,  Xiaonan Chen ,  Zhongze Wang

IPC: G11C16/10 ,  H01L29/792 ,  H01L29/423 ,  H01L29/51 ,  G11C17/18 ,  H01L27/112 ,  G11C16/26 ,  G11C16/04

CPC classification number: H01L29/792 ,  G11C16/0466 ,  G11C16/10 ,  G11C16/26 ,  G11C17/18 ,  H01L27/11206 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/517

Abstract: An apparatus includes a metal gate, a substrate material, and an oxide layer between the metal gate and the substrate material. The oxide layer includes a hafnium oxide layer contacting the metal gate and a silicon dioxide layer contacting the substrate material and contacting the hafnium oxide layer. The metal gate, the substrate material, and the oxide layer are included in a one-time programmable (OTP) memory device. The OTP memory device includes a transistor. A non-volatile state of the OTP memory device is based on a threshold voltage shift of the OTP memory device.

公开(公告)号：US20160020220A1

公开(公告)日：2016-01-21

申请号：US14495507

申请日：2014-09-24

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Jeffrey Junhao Xu ,  Xiao Lu ,  Bin Yang ,  Jun Yuan ,  Xiaonan Chen ,  Zhongze Wang

IPC: H01L27/115 ,  G11C16/10 ,  G11C16/26 ,  H01L29/792

CPC classification number: H01L29/792 ,  G11C16/0466 ,  G11C16/10 ,  G11C16/26 ,  G11C17/18 ,  H01L27/11206 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/517

Abstract: An apparatus includes a metal gate, a substrate material, and an oxide layer between the metal gate and the substrate material. The oxide layer includes a hafnium oxide layer contacting the metal gate and a silicon dioxide layer contacting the substrate material and contacting the hafnium oxide layer. The metal gate, the substrate material, and the oxide layer are included in a one-time programmable (OTP) memory device. The OTP memory device includes a transistor. A non-volatile state of the OTP memory device is based on a threshold voltage shift of the OTP memory device.

Abstract translation: 一种装置包括金属栅极，衬底材料和金属栅极和衬底材料之间的氧化物层。 氧化物层包括与金属栅极接触的氧化铪层和与衬底材料接触并与氧化铪层接触的二氧化硅层。 金属栅极，衬底材料和氧化物层包括在一次性可编程（OTP）存储器件中。 OTP存储器件包括晶体管。 OTP存储器件的非易失性状态基于OTP存储器件的阈值电压偏移。