公开(公告)号：US20160041852A1

公开(公告)日：2016-02-11

申请号：US14451628

申请日：2014-08-05

Applicant: QUALCOMM Incorporated

Inventor： Dario Suarez Gracia ,  Han Zhao ,  Pablo Montesinos Ortego ,  Gheorghe Calin Cascaval ,  James Xenidis

IPC: G06F9/54 ,  G06F1/32 ,  G06F9/50

CPC classification number: G06F1/3296 ,  G06F9/4856 ,  G06F9/4893 ,  G06F9/526 ,  Y02D10/24

Abstract: Multi-processor computing device methods manage resource accesses by a signaling event manager signaling processor elements requesting access to a resource to wake up to access the resource when the resource is available or wait for an event when the resource is busy. Processor elements may enter a sleep state while awaiting access to the requested resource. When multiple elements are waiting for the resource, the processor element with a highest assigned priority is signaled to wake up when the resource is available without waking other elements. Priorities may be assigned to processor elements waiting for the resource based on a heuristic or parameter that may depend on a state of the computing device or the processor elements. A sleep duration may be estimated for a processor element waiting for a resource and the processor element may be removed from a scheduling queue or assigned another thread during the sleep duration.

Abstract translation: 多处理器计算设备方法通过信令事件管理器信令处理器元件管理资源访问，所述信令处理器元件在资源可用时请求访问资源以唤醒资源以访问资源，或在资源占用时等待事件。 处理器元件可以在等待访问所请求的资源的同时进入休眠状态。 当多个元素正在等待资源时，具有最高分配优先级的处理器元件发出信号，以在资源可用时唤醒，而不唤醒其他元素。 可以基于可能依赖于计算设备或处理器元件的状态的启发式或参数将优先级分配给等待资源的处理器元件。 可以为等待资源的处理器元件估计睡眠持续时间，并且可以在睡眠持续时间期间将处理器元件从调度队列中移除或分配另一线程。

公开(公告)号：US09778951B2

公开(公告)日：2017-10-03

申请号：US14884929

申请日：2015-10-16

Applicant: QUALCOMM Incorporated

Inventor： Arun Raman ,  Pablo Montesinos Ortego

IPC: G06F9/48

CPC classification number: G06F9/485 ,  G06F9/4812 ,  G06F9/4843

Abstract: Embodiments include computing devices, systems, and methods for task signaling on a computing device. Execution of a task by an initial thread on a critical path of execution may be interrupted to create at least one parallel task by the initial thread that can be executed in parallel with the task executed by the initial thread. An initial signal indicating the creation of the at least one parallel task to a relay thread may be sent by the initial thread. Execution of the task by the initial thread may resume before an acquisition of the at least one parallel task.

公开(公告)号：US09710315B2

公开(公告)日：2017-07-18

申请号：US14599609

申请日：2015-01-19

Applicant: QUALCOMM Incorporated

Inventor： Tushar Kumar ,  Pablo Montesinos Ortego ,  Arun Raman

IPC: G06F9/54 ,  G06F9/46 ,  G06F9/30 ,  G06F21/62

CPC classification number: G06F9/542 ,  G06F9/3009 ,  G06F9/461 ,  G06F21/629 ,  G06F2221/2147

Abstract: A computing device may be configured to generate and execute a task that includes one or more blocking constructs that each encapsulate a blocking activity and a notification handler corresponding to each blocking activity. The computing device may launch the task, execute one or more of the blocking constructs, register the corresponding notification handler for the blocking activity that will be executed next with the runtime system, perform the blocking activity encapsulated by the blocking construct to request information from an external resource, cause the task to enter a blocked state while it waits for a response from the external resource, receive an unblocking notification from an external entity, and invoke the registered notification handler to cause the task to exit the blocked state and/or perform clean up operations to exit/terminate the task gracefully.

公开(公告)号：US09632569B2

公开(公告)日：2017-04-25

申请号：US14451628

申请日：2014-08-05

Applicant: QUALCOMM Incorporated

Inventor： Dario Suarez Gracia ,  Han Zhao ,  Pablo Montesinos Ortego ,  Gheorghe Calin Cascaval ,  James Xenidis

IPC: G06F9/30 ,  G06F1/32 ,  G06F9/52 ,  G06F9/48

CPC classification number: G06F1/3296 ,  G06F9/4856 ,  G06F9/4893 ,  G06F9/526 ,  Y02D10/24

Abstract: Multi-processor computing device methods manage resource accesses by a signaling event manager signaling processor elements requesting access to a resource to wake up to access the resource when the resource is available or wait for an event when the resource is busy. Processor elements may enter a sleep state while awaiting access to the requested resource. When multiple elements are waiting for the resource, the processor element with a highest assigned priority is signaled to wake up when the resource is available without waking other elements. Priorities may be assigned to processor elements waiting for the resource based on a heuristic or parameter that may depend on a state of the computing device or the processor elements. A sleep duration may be estimated for a processor element waiting for a resource and the processor element may be removed from a scheduling queue or assigned another thread during the sleep duration.

公开(公告)号：US20170109195A1

公开(公告)日：2017-04-20

申请号：US14884929

申请日：2015-10-16

Applicant: QUALCOMM Incorporated

Inventor： Arun Raman ,  Pablo Montesinos Ortego

IPC: G06F9/48

CPC classification number: G06F9/485 ,  G06F9/4812 ,  G06F9/4843

Abstract: Embodiments include computing devices, systems, and methods for task signaling on a computing device. Execution of a task by an initial thread on a critical path of execution may be interrupted to create at least one parallel task by the initial thread that can be executed in parallel with the task executed by the initial thread. An initial signal indicating the creation of the at least one parallel task to a relay thread may be sent by the initial thread. Execution of the task by the initial thread may resume before an acquisition of the at least one parallel task.

公开(公告)号：US20160292012A1

公开(公告)日：2016-10-06

申请号：US14673857

申请日：2015-03-30

Applicant: QUALCOMM Incorporated

Inventor： Behnam ROBATMILI ,  Shaizeen Dilawarhusen Aga ,  Dario Suarez Gracia ,  Arun Raman ,  Aravind Natarajan ,  Gheorghe Calin Cascaval ,  Pablo Montesinos Ortego ,  Han Zhao

IPC: G06F9/50

CPC classification number: G06F9/5066 ,  G06F9/5027

Abstract: Embodiments include computing devices, systems, and methods for task-based handling of repetitive processes in parallel. At least one processor of the computing device, or a specialized hardware controller, may be configured to partition iterations of a repetitive process and assign the partitions to initialized tasks to be executed in parallel by a plurality of processor cores. Upon completing a task, remaining divisible partitions of the repetitive process of ongoing tasks may be subpartitioned and assigned to the ongoing task, and the completed task or a newly initialized task. Information about the iteration space for a repetitive process may be stored in a descriptor table, and status information for all partitions of a repetitive process stored in a status table. Each processor core may have an associated local table that tracks iteration execution of each task, and is synchronized with the status table.

Abstract translation: 实施例包括用于并行地重复处理的基于任务的处理的计算设备，系统和方法。 计算设备的至少一个处理器或专用硬件控制器可以被配置为分区重复过程的迭代，并且将分区分配给由多个处理器核并行执行的初始化任务。 完成任务后，正在执行的任务的重复进程的剩余可分区可以被分分区并分配给正在进行的任务，以及完成的任务或新初始化的任务。 关于重复过程的迭代空间的信息可以存储在描述符表中，以及存储在状态表中的重复进程的所有分区的状态信息。 每个处理器核心可以具有跟踪每个任务的迭代执行的相关联的本地表，并且与状态表同步。

公开(公告)号：US20150268993A1

公开(公告)日：2015-09-24

申请号：US14336288

申请日：2014-07-21

Applicant: QUALCOMM Incorporated

Inventor： Pablo Montesinos Ortego ,  Michael Weber ,  Han Zhao

IPC: G06F9/48 ,  G06F9/54

CPC classification number: G06F9/4881 ,  G06F8/452 ,  G06F9/44 ,  G06F9/485 ,  G06F9/5066 ,  G06F9/54

Abstract: Aspects include computing devices, systems, and methods for task-based handling of nested repetitive processes in parallel. At least one processor of the computing device may be configured to partition iterations of an outer repetitive process and assign the partitions to initialized tasks to be executed in parallel by a plurality of processor cores. A shadow task may be initialized for each task to execute iterations of an inner repetitive process. Upon completing a task, divisible partitions of the outer repetitive process of ongoing tasks may be subpartitioned and assigned to the ongoing task, and the completed task and shadow task or a newly initialized task and shadow task. Upon completing all but one task and one iteration of the outer repetitive process, shadow tasks may be initialized to execute partitions of iterations of the inner repetitive process.

Abstract translation: 方面包括并行执行嵌套重复过程的基于任务的处理的计算设备，系统和方法。 计算设备的至少一个处理器可以被配置为分配外部重复过程的迭代，并且将分区分配给由多个处理器核并行执行的初始化任务。 可以为每个任务初始化影子任务以执行内部重复过程的迭代。 完成任务后，正在执行的任务的外部重复进程的可分割分区可以被分区并分配给正在进行的任务，并且完成任务和影子任务或新初始化的任务和影子任务。 完成外部重复过程的所有除了一个任务和一个迭代之外，可以对影子任务进行初始化，以执行内部重复过程的迭代分区。

公开(公告)号：US20140053058A1

公开(公告)日：2014-02-20

申请号：US13864812

申请日：2013-04-17

Applicant: QUALCOMM INCORPORATED

Inventor： Michael WEBER ,  Pablo Montesinos Ortego ,  Mark S. Fowler

IPC: G06F17/22

CPC classification number: G06F17/2247 ,  G06F17/211 ,  G06F17/30902

Abstract: Browser systems and methods of loading/rendering a webpage include preprocessing the web document (HTML page) using speculation/prediction techniques to identify the resources that are likely to be required from an incomplete set of information, and requesting/pre-fetching the resources that are determined to have a high probability of being required for proper rending of the web document. The speculation/prediction techniques may include the use of heuristics to improve the efficiency and speed of document loads and network communications.