摘要:
A transceiver mitigates signal leakage into a receive path from a transmit path. A subtraction circuit determines a difference between a receive signal and a compensation signal to produce a compensated receive signal prior to demodulation by a demodulator. An equalizer both amplitude adjusts and phase adjusts orthogonal baseband transmit signals based on the difference from the subtraction circuit to produce the compensation signal. A digital tuning circuit determines at least one amplitude adjust coefficient to be used by the equalizer. The equalizer can have a polarity switch or a variable attenuator or a variable delay.
摘要:
An audio amplifier includes a digital signal processor (DSP) that contains a noise shaping quantizer having an integrating error amplifier. The integrating error amplifier contains integrators connected in a feedback loop, a summer supplied with an output of each of the integrators, and a saturation function module producing a saturation function. A multiplier is disposed between each pair of adjacent integrators. The multiplier receives a signal from one of the adjacent integrators and the saturation function and supplies a signal to the other of the adjacent integrators. The saturation function decreases the effect of all of the integrators except an integrator to which an input signal to the integrating amplifier is supplied using an input signal to and/or an output signal from the noise shaping quantizer. This permits the duty ratio of the output signal from the noise shaping quantizer to extend from 0% to 100%.
摘要:
Disclosed is a method and/or apparatus for adjusting the sample time and order associated with a digital correction system for maximizing output power and minimizing power stage delay sensitivity of a switching power stage. In certain embodiments, the sample point of an ADC may be changed as a function of the duty ratio of the PWM signal thus allowing higher performance and use of less expensive power stage components. In addition, adjustment of the order of an integrating error amplifier in the system permits operation of the power stage with an output being permitted to saturate up to the power supply rails, thus increasing a power output of the power stage.
摘要:
Embodiments of the present invention deal generally with circuitry and methods for converting a sampled digital signal (32) to a naturally sampled digital signal (34). One embodiment relating to a method includes receiving the sampled digital signal, calculating a duty ratio estimate (33) using feedback (52), and using interpolation (62) to determine the naturally sampled digital signal. Circuitry for converting a sampled digital signal (32) to a naturally sampled digital signal (34) includes a natural sampler, where the natural sampler includes an input to receive the sampled digital signal (32) and an input to receive a feedback signal (52). The natural sampler has an output to provide the naturally sampled digital signal (34). In one embodiment, the natural sampler calculates a duty ratio (33) using the feedback signal (52) and uses interpolation to determine the naturally sampled digital signal (34).
摘要:
A method and apparatus for a pulse width modulated (PWM) signal (30, 130) is provided. The input is a digital signal which is a modulated signal (24, 124). In the illustrated form, the modulated input signal is either a PDM signal or a PCM signal. In one embodiment of the present invention a PCM to PWM converter (16, 116) includes correction of duty ratio circuitry (48). The methodology used may include recursion on the values obtained after prediction, interpolation, and correction. The digital to analog conversion system (10) uses a PDM to PWM converter (20) which operates in an all digital domain and includes no analog circuitry.
摘要:
A switching amplifier (15) includes a power stage (18) and a digital correction circuit (16). The digital correction circuit (16) is for correcting nonlinearity and power supply noise introduced into a digital signal during power stage amplification. The digital correction circuit (16) receives a digital pulse modulated input signal from a processor (14) and an amplified pulse modulated output signal from the power stage (18), and performs a discrete-time pulse edge correction on the digital pulse modulated input signal to provide a corrected digital pulse modulated signal. The corrected digital pulse modulated signal is used as an input for the power stage (18).
摘要:
An interference dependent adaptive phase clock controller method and system includes synthesis of a signal processing clock signal (307). An interference signal (311 ) dependent on a phase of the signal processing clock signal is measured, and a phase correction signal (317) is provided dependent thereon. A magnitude of the interference signal is reduced by adjusting the phase of the signal processing clock signal (307) dependent on the phase correction signal (317).
摘要:
An edge seal structure and fabrication method are described. The edge seal structure includes a high impedance substrate containing a base material and a grounded floating edge seal that is on the substrate but is isolated from the base material. The edge seal contacts a first doped well in the substrate that has the same conductivity type as and is more heavily doped than the base material. The first doped well is in a second doped well that has a different conductivity type than the first doped well. The first and second doped wells and the base material form back-to-back series connected diodes. The wells are effectively connected to power and ground such that the diodes are reverse-biased. The edge seal is formed by a stack of conductive layers, at least some of which are surrounded by a stack of insulating layers.
摘要:
In a communication unit a receiver (104) receives a modulated signal (118), and produces a received signal (120) having a parameter. The receiver (104) has a discontinuous receive mode of operation, wherein the receiver (104) is permitted to be turned on and off. Receiver circuitry (105) receives the received signal (120), and produces an output signal (124) having a parameter. A controller (110) adjusts a value of the parameter of the output signal (124), responsive to a value of the parameter of the received signal (120), during the times when the receiver (140) is turned on; and holds the value of the parameter of the output signal (124), responsive to the value of the parameter of the received signal (120), at the time when the receiver (104) is turned off. The present invention advantageously minimizes the turn on time for the receiver (104) operating in a discontinuous receive mode to save current drain.
摘要:
A method and apparatus to produce a pulse width modulated (PWM) signal from pulse code modulated (PCM) data. In one embodiment, a crossing point of an analog signal with the ramp portion of a sawtooth waveform is approximated by first extrapolating, or projecting, a line between two adjacent sample points across other sample points to produce an estimate of the crossing point. A magnitude difference between a crossing point of the extrapolated line and a sample point magnitude on each side of the crossing point is determined. The magnitude difference, multiplied by an empirically determined constant, is added to the estimate. A PWM signal is then produced using the estimate for the crossing point.