公开(公告)号：US11373713B1

公开(公告)日：2022-06-28

申请号：US17209214

申请日：2021-03-22

Applicant: PHISON ELECTRONICS CORP.

Inventor： Shih-Jia Zeng ,  Lih Yuarn Ou ,  Hsiao-Yi Lin ,  Wei Lin

IPC: G11C16/34 ,  G11C16/26 ,  G11C16/30

Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: reading multiple first memory cells using multiple read voltage levels to obtain a first threshold voltage distribution of the first memory cells; obtaining shift information of the first threshold voltage distribution with respect to an original threshold voltage distribution of the first memory cells; obtaining first reliability information corresponding to the first threshold voltage distribution; recovering original reliability information corresponding to the original threshold voltage distribution according to a statistical characteristic of the first reliability information; adjusting the original reliability information according to the shift information to obtain second reliability information corresponding to the first threshold voltage distribution; and updating reliability information related to the first memory cells according to the second reliability information.