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    INTEGRATING RAMP CIRCUIT WITH REDUCED RAMP SETTLING TIME
    11.
    发明申请
    INTEGRATING RAMP CIRCUIT WITH REDUCED RAMP SETTLING TIME 审中-公开

    公开(公告)号：US20200295739A1

    公开(公告)日：2020-09-17

    申请号：US16352673

    申请日：2019-03-13

    Applicant: OmniVision Technologies, Inc.

    Inventor： Liang Zuo ,  Rui Wang ,  Hiroaki Ebihara ,  Nijun Jiang

    IPC: H03K4/56 ,  H03F3/45 ,  H03M1/56 ,  H04N5/378 ,  H04N5/369 ,  H04N5/3745

    Abstract: A ramp generator includes an integrator including a first stage having first and second inputs and first and second outputs, and a second stage including first and second transistors coupled between a power supply rail and ground. A node between the first and second transistors is coupled to the output of the integrator amplifier. A control terminal of the first transistor is coupled to the first output of the first stage, and a control terminal of the second transistor is coupled to the second output of the first stage. A first current flows from the output to ground during a ramp event in the ramp signal generated from the output. Trimming circuitry is coupled to the output of the integrator amplifier to provide a second current to the output of the integrator amplifier in response to trimming inputs. The second current substantially matches the first current.

    Image sensor pixel noise measurement
    12.
    发明授权
    Image sensor pixel noise measurement 有权

    公开(公告)号：US09961281B2

    公开(公告)日：2018-05-01

    申请号：US15179648

    申请日：2016-06-10

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Bi Yuan ,  Liping Deng ,  Yingkan Lin ,  Liang Zuo ,  Yuxin Wang

    IPC: H04N5/357 ,  H04N5/378

    CPC classification number: H04N5/357 ,  H04N5/378

    Abstract: An image sensor pixel noise measurement circuit includes a pixel array on an integrated circuit chip. The pixel array includes a plurality of pixels including a first pixel to output a first image data signal, and a second pixel to output a second image data signal. A noise amplification circuit on the integrated circuit chip is coupled to receive the first and second image data signals from the pixel array. The noise amplification circuit is coupled to output an amplified differential noise signal in response to the first and second image data signals received from the pixel array. A fast Fourier transform (FFT) analysis circuit on the integrated circuit chip is coupled to transform the amplified differential noise signal output by the noise amplification circuit from a time domain to a frequency domain to analyze a pixel noise characteristic of the pixel array.

    Adaptive correlated multiple sampling
    13.
    发明授权
    Adaptive correlated multiple sampling 有权

    公开(公告)号：US12294804B2

    公开(公告)日：2025-05-06

    申请号：US18322431

    申请日：2023-05-23

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Jiayu Guo ,  Hiroaki Ebihara ,  Liang Zuo ,  Lihang Fan ,  Satoshi Sakurai

    IPC: H04N25/78 ,  H04N25/616

    Abstract: An arithmetic logic unit (ALU) includes a front end latch stage coupled to a Gray code (GC) generator to latch GC outputs, a signal latch stage coupled to latch outputs of the front end latch stage, a GC to binary stage coupled to generate a binary representation of the GC outputs, an adder stage including first inputs coupled to receive outputs of the GC to binary stage, a pre-latch stage coupled to latch outputs of the adder stage, and a feedback latch stage coupled to latch outputs of the pre-latch stage in response to a feedback latch enable signal. The feedback latch enable signal is one of a correlated multiple sampling (CMS) feedback enable signal and a non-CMS feedback enable signal. The ALU is configured to perform CMS calculations in response to the CMS feedback enable signal and perform non-CMS calculations in response to the non-CMS feedback enable signal.

    Integrating ramp circuit with reduced ramp settling time
    16.
    发明授权
    Integrating ramp circuit with reduced ramp settling time 有权

    公开(公告)号：US10826470B2

    公开(公告)日：2020-11-03

    申请号：US16352673

    申请日：2019-03-13

    Applicant: OmniVision Technologies, Inc.

    Inventor： Liang Zuo ,  Rui Wang ,  Hiroaki Ebihara ,  Nijun Jiang

    IPC: H03K4/56 ,  H04N5/3745 ,  H03M1/56 ,  H04N5/378 ,  H04N5/369 ,  H03F3/45

    Abstract: A ramp generator includes an integrator including a first stage having first and second inputs and first and second outputs, and a second stage including first and second transistors coupled between a power supply rail and ground. A node between the first and second transistors is coupled to the output of the integrator amplifier. A control terminal of the first transistor is coupled to the first output of the first stage, and a control terminal of the second transistor is coupled to the second output of the first stage. A first current flows from the output to ground during a ramp event in the ramp signal generated from the output. Trimming circuitry is coupled to the output of the integrator amplifier to provide a second current to the output of the integrator amplifier in response to trimming inputs. The second current substantially matches the first current.

    IMAGE SENSOR PIXEL NOISE MEASUREMENT
    17.
    发明申请
    IMAGE SENSOR PIXEL NOISE MEASUREMENT 有权

    公开(公告)号：US20170359532A1

    公开(公告)日：2017-12-14

    申请号：US15179648

    申请日：2016-06-10

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Bi Yuan ,  Liping Deng ,  Yingkan Lin ,  Liang Zuo ,  Yuxin Wang

    IPC: H04N5/357 ,  H04N5/378

    CPC classification number: H04N5/357 ,  H04N5/378

    Abstract: An image sensor pixel noise measurement circuit includes a pixel array on an integrated circuit chip. The pixel array includes a plurality of pixels including a first pixel to output a first image data signal, and a second pixel to output a second image data signal. A noise amplification circuit on the integrated circuit chip is coupled to receive the first and second image data signals from the pixel array. The noise amplification circuit is coupled to output an amplified differential noise signal in response to the first and second image data signals received from the pixel array. A fast Fourier transform (FFT) analysis circuit on the integrated circuit chip is coupled to transform the amplified differential noise signal output by the noise amplification circuit from a time domain to a frequency domain to analyze a pixel noise characteristic of the pixel array.

    Adaptive correlated multiple sampling
    18.
    发明授权
    Adaptive correlated multiple sampling 有权

    公开(公告)号：US12200389B2

    公开(公告)日：2025-01-14

    申请号：US18322408

    申请日：2023-05-23

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Hiroaki Ebihara ,  Jiayu Guo ,  Liang Zuo ,  Lihang Fan

    IPC: H04N25/78 ,  H03K3/037 ,  H03K5/22 ,  H03K5/24 ,  H03K19/20 ,  H04N25/616

    Abstract: A readout circuit includes a comparator having a first input coupled to receive a ramp signal from a ramp generator and a second input coupled to receive an analog image data signal from one of a plurality of bitlines. The comparator is configured to generate a comparator output in response to a comparison of the ramp signal and the analog image data signal. A sampling circuit has a first input coupled to receive a sampling control signal and a second input coupled to receive the comparator output. The sampling circuit is configured to generate a sampling output. A counter has a first input coupled to receive a counter control signal and a second input coupled to receive one of the comparator output and a signal from the sampling circuit. The readout circuit is configured to perform correlated multiple sampling (CMS) calculations or non-CMS calculations in response to the sampling output.

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