公开(公告)号：US5583851A

公开(公告)日：1996-12-10

申请号：US272158

申请日：1994-07-08

Applicant: Osamu Kato ,  Nobuo Asano

Inventor： Osamu Kato ,  Nobuo Asano

IPC: H04B1/707 ,  H04B7/26 ,  H04J11/00 ,  H04J13/00 ,  H04J13/18 ,  H04L1/00 ,  H04J13/04

CPC classification number: H04B7/264 ,  H04B1/707 ,  H04J13/004 ,  H04J13/0077 ,  H04J13/18 ,  H04L1/0045

Abstract: A mobile communication unit which can perform a high-bit rate information transmission by allocating a plurality of channel numbers to a user who carries out a high-bit rate communication. The mobile communication unit includes a set of units at the transmitter side 21 and a set of units at the receiver side 22, to carry out communications by allocating spread codes to channels within the same cell. A plurality of channel numbers are allocated to one user. The transmitter side units include the separating unit 23 for separating the user information, the spread modulator 30 for spread processing the separated information by using the spread codes corresponding to the respective channel numbers, and the combining unit 31 for combining the diffused information and outputting the combined information to the receiver side unit. The receiver side units include the despreader 32 for despread the diffused information by using the spread codes of the respective channel numbers allocated to the user, and the multiplexing unit 33 for combining the despreaded information of the plurality of channels. Thus, a high-bit rate transmission service is provided.

Abstract translation: 一种移动通信单元，其可以通过向执行高比特率通信的用户分配多个频道号码来执行高比特率信息传输。 移动通信单元包括在发射机侧21处的一组单元和接收机侧22处的一组单元，以通过向同一小区内的信道分配扩频码来进行通信。 多个频道号被分配给一个用户。 发送机侧单元包括用于分离用户信息的分离单元23，扩展调制器30，用于通过使用对应于各个频道号的扩展码扩展处理分离的信息;以及组合单元31，用于组合扩散信息并输出 组合信息到接收机侧单元。 接收机侧单元包括用于通过使用分配给用户的相应通道号的扩展码解扩扩散信息的解扩器32和用于组合多个信道的解扩信息的复用单元33。 因此，提供了高比特率传输服务。

公开(公告)号：US06697384B2

公开(公告)日：2004-02-24

申请号：US09916284

申请日：2001-07-30

Applicant: Nobuo Asano

Inventor： Nobuo Asano

IPC: H04J306

CPC classification number: H04J13/0022 ,  G06F7/584 ,  H03K3/84 ,  H04J13/10

Abstract: An apparatus is provided that calculates a state at a time of starting an operation of a shift register that generates a PN code. The apparatus includes a system that obtains a parameter “i” that pertains to the state at the time of starting an operation, a system that obtains coefficients of a generator polynomial corresponding to the PN code, and a system that calculates the state at the time of starting an operation, based on the parameter “i” and the coefficients of the generator polynomial.

Abstract translation: 提供了一种计算在开始生成PN码的移位寄存器的操作时的状态的装置。 该装置包括获取与开始操作时的状态有关的参数“i”的系统，获得与该PN码相对应的生成多项式的系数的系统，以及计算该时间的状态的系统 基于参数“i”和生成多项式的系数开始操作。

公开(公告)号：US5987339A

公开(公告)日：1999-11-16

申请号：US956354

申请日：1997-10-23

Applicant: Nobuo Asano

Inventor： Nobuo Asano

IPC: G06F1/04 ,  H04B1/16 ,  H04B7/26 ,  H04M1/73 ,  H04W52/02 ,  H04Q7/20

CPC classification number: H04W52/029 ,  H03L1/00 ,  H03L7/00 ,  H04B2201/70709 ,  H04W52/0283

Abstract: A receiving portion of a radio communication device includes a circuit periodically moving into a sleep mode of operation. The circuit periodically moves out of the sleep mode of operation in response to a re-activation signal. A first clock signal is generated. Clock pulses in the first clock signal are counted. The re-activation signal is generated each time the number of the counted clock pulses in the first clock signal reaches an updatable number. A second clock signal is generated which has a frequency higher than a frequency of the first clock signal. Clock pulses in the second clock signal are counted during every time interval determined by the first clock signal. An error of the frequency of the first clock signal with respect to the frequency of the second clock signal is calculated on the basis of a result of the counting of clock pulses in the second clock signal. The updatable number is set in response to the calculated error of the frequency of the first clock signal.

Abstract translation: 无线电通信设备的接收部分包括周期性地进入睡眠操作模式的电路。 电路响应于再启动信号而周期性地移出睡眠操作模式。 产生第一时钟信号。 对第一个时钟信号中的时钟脉冲进行计数。 每当第一时钟信号中计数的时钟脉冲的数量达到可更新的数目时，就产生重新激活信号。 产生具有高于第一时钟信号的频率的频率的第二时钟信号。 在由第一时钟信号确定的每个时间间隔期间，对第二时钟信号中的时钟脉冲进行计数。 基于第二时钟信号中的时钟脉冲的计数结果计算第一时钟信号相对于第二时钟信号的频率的频率的误差。 响应于计算出的第一时钟信号的频率误差来设定可更新号码。

公开(公告)号：US5905965A

公开(公告)日：1999-05-18

申请号：US272157

申请日：1994-07-08

Applicant: Nobuo Asano ,  Osamu Kato

Inventor： Nobuo Asano ,  Osamu Kato

IPC: H04B7/26 ,  H04W24/00 ,  H04W52/02 ,  H04W72/04 ,  H04W74/04 ,  H04W88/08 ,  H04Q7/32

CPC classification number: H04W52/0229 ,  H04W52/0274 ,  H04W68/00 ,  Y02B60/50

Abstract: A base station includes an incoming call terminal identification message generating portion When the base station transmits an incoming call message to a terminal, an incoming call terminal identification message useful for only the incoming call terminal, for example a message such as ID number information peculiar to the terminal, is inserted in the head of a slot assigned to the terminal and is transmitted. When the incoming call terminal detects the incoming call terminal identification message, the terminal receives a regular incoming call message transmitted thereafter. When the terminal cannot detect the incoming call terminal identification message, the terminal judges that the message is not directed to a call to its own terminal and immediately stops monitoring of the slot at this time.

Abstract translation: 基站包括来电终端识别消息生成部分当基站向终端发送呼入呼叫消息时，仅对呼入终端有用的呼入终端识别消息，例如，诸如ID号码信息特有的消息， 终端被插入分配给终端的时隙的头部并被发送。 当来电终端检测到来电终端识别消息时，终端收到此后发送的常规来电消息。 当终端无法检测到来电终端识别消息时，终端判断该消息未被指向对其本身终端的呼叫，并且此时立即停止对该时隙的监视。

公开(公告)号：US5715470A

公开(公告)日：1998-02-03

申请号：US126563

申请日：1993-09-27

Applicant: Nobuo Asano ,  Mitsuru Uesugi ,  Toshihiro Ishikawa ,  Minoru Okamoto

Inventor： Nobuo Asano ,  Mitsuru Uesugi ,  Toshihiro Ishikawa ,  Minoru Okamoto

IPC: G06F17/10 ,  H03M13/41 ,  G06F7/00 ,  G06F15/00

CPC classification number: H03M13/6502 ,  G06F17/10 ,  H03M13/3961 ,  H03M13/41 ,  H03M13/4107 ,  H03M13/413 ,  H03M13/4169 ,  H03M13/6505

Abstract: An arithmetic apparatus in which while data read out of a memory is shifted by means of a barrel shifter by a shift bit number designated by data standing for an output signal of an inverter, data standing for an output signal of the barrel shifter is inputted to a shift register to thereby perform Viterbi decoding at a high speed.

Abstract translation: 一种算术装置，其中当通过桶形移位器通过由反相器的输出信号指定的数据指定的移位位数来移位存储器的数据时，将桶形移位器的输出信号的数据输入到 移位寄存器，从而以高速执行维特比解码。