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公开(公告)号：US07302011B1
公开(公告)日：2007-11-27
申请号：US10272389
申请日：2002-10-16
申请人： Marcus Granger-Jones
发明人： Marcus Granger-Jones
CPC分类号： H03B27/00 , G06F7/68 , H03B19/14 , H03K5/00006
摘要： The frequency doubler of the present invention operates to provide an in-phase signal and a quadrature signal, each having a frequency equal to twice the frequency of a reference signal. The in-phase and quadrature signals are based on signals that are 0 degrees, 45 degrees, 90 degrees, and 135 degrees out of phase with the reference signal. The in-phase signal is provided by multiplying the signals that are 0 degrees and 90 degrees out of phase with the reference signal, and the quadrature signal is provided by multiplying the signals that are 45 degrees and 135 degrees out of phase with the reference signal.
摘要翻译： 本发明的倍频器用于提供同相信号和正交信号，每个信号具有等于参考信号频率的两倍的频率。 同相和正交信号基于与参考信号0度，45度，90度和135度异相的信号。 通过将与参考信号相差0度和90度异相的信号相乘来提供同相信号，并且通过将与参考信号相差45度和135度异相的信号相乘来提供正交信号 。
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12.发明授权公开(公告)号：US07251298B1
公开(公告)日：2007-07-31
申请号：US10644231
申请日：2003-08-20
摘要： The present invention provides a receiver frontend that eliminates static and dynamic DC errors and has improved second order intermodulation distortion (IMD2) performance. The receiver frontend includes a first mixer that multiplies a received signal and a first local oscillator (LO) signal to produce an intermediate frequency (IF) signal. A second mixer multiplies the IF signal and a second LO signal to produce an output signal. A first divider circuit divides a reference signal from a reference oscillator by a first divisor N to produce the first LO signal, and a second divider circuit divides the reference signal by a second divisor M to produce the second LO signal. Preferably, the first and second divisors N and M are each integers greater than one (1), and the second divisor M is not an integer multiple of the first divisor N.
摘要翻译： 本发明提供一种消除静态和动态DC误差并具有改进的二阶互调失真（IMD2）性能的接收器前端。 接收器前端包括将接收信号和第一本地振荡器（LO）信号相乘以产生中频（IF）信号的第一混频器。 第二混频器将IF信号和第二LO信号相乘以产生输出信号。 第一除法器电路将来自参考振荡器的参考信号由第一除数N分频以产生第一LO信号，并且第二除法器电路将参考信号除以第二除数M以产生第二LO信号。 优选地，第一和第二因子N和M各自是大于1（1）的整数，并且第二因子M不是第一因子N的整数倍。
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公开(公告)号：US06906584B1
公开(公告)日：2005-06-14
申请号：US10732106
申请日：2003-12-10
申请人： Mark Moffat , Marcus Granger-Jones
发明人： Mark Moffat , Marcus Granger-Jones
CPC分类号： H03G3/3078 , H03F2203/7215 , H03F2203/7218 , H03G1/0088 , H03G3/3052 , H03G2201/103 , H03G2201/202 , H03G2201/305 , H03G2201/502
摘要： The present invention provides a switchable gain amplifier comprising a high-pass filter pole. The switchable gain amplifier comprises first and second input nodes for receiving first and second components of a differential input signal. A first input terminal of a first differential amplifier is coupled to the first input node, and a first input terminal of a second differential amplifier is coupled to the second input node. A first variable resistance is coupled between the first input terminal of the first differential amplifier and a second input terminal of the first differential amplifier. A second variable resistance is coupled between the first input terminal of the second differential amplifier and a second input terminal of the second differential amplifier. A differential capacitor is coupled between the second input terminal of the first differential amplifier and the second input terminal of the second differential amplifier.
摘要翻译： 本发明提供一种包括高通滤波器极的可切换增益放大器。 可切换增益放大器包括用于接收差分输入信号的第一和第二分量的第一和第二输入节点。 第一差分放大器的第一输入端耦合到第一输入节点，第二差分放大器的第一输入端耦合到第二输入节点。 第一可变电阻耦合在第一差分放大器的第一输入端和第一差分放大器的第二输入端之间。 第二可变电阻耦合在第二差分放大器的第一输入端和第二差分放大器的第二输入端之间。 差分电容器耦合在第一差分放大器的第二输入端和第二差分放大器的第二输入端之间。
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公开(公告)号：US06831506B1
公开(公告)日：2004-12-14
申请号：US10665234
申请日：2003-09-17
申请人： Mark Moffat , Marcus Granger-Jones
发明人： Mark Moffat , Marcus Granger-Jones
IPC分类号： H03B100
CPC分类号： H03H11/1291
摘要： The present invention provides a reconfigurable filter having a bandwidth and frequency offset that are independently configured, thereby allowing the filter to realize any filter pole. In general, the filter includes a filtering stage and a reverse gain stage. The filtering stage has a bandwidth configured by a bandwidth control signal from control logic and a frequency offset configured by an offset control signal. The reverse gain stage provides the offset control signal to the filtering stage based a reverse gain control signal from the control logic and the output signal. Based on the bandwidth control signal and the reverse gain control signal, the bandwidth of the filter is configured independently from the frequency offset of the filter and the frequency offset is configured independently from the bandwidth.
摘要翻译： 本发明提供一种具有独立配置的带宽和频率偏移的可重构滤波器，从而允许滤波器实现任何滤波器极。 通常，滤波器包括滤波级和反向增益级。 滤波级具有由来自控制逻辑的带宽控制信号和由偏移控制信号构成的频率偏移配置的带宽。 反向增益级基于来自控制逻辑和输出信号的反向增益控制信号将偏移控制信号提供给滤波级。 基于带宽控制信号和反向增益控制信号，滤波器的带宽被独立于滤波器的频率偏移量配置，并且频率偏移独立于带宽配置。
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公开(公告)号：US09190699B2
公开(公告)日：2015-11-17
申请号：US13606139
申请日：2012-09-07
申请人： Marcus Granger-Jones , Nadim Khlat
发明人： Marcus Granger-Jones , Nadim Khlat
CPC分类号： H01P1/15 , H01P1/10 , H04B1/006 , H04B1/1027 , H04B1/109 , H04B2001/1054 , H04B2001/1063
摘要： A band switch with a switchable notch for receive carrier aggregation is disclosed. The band switch has at least one input and an output with at least one series switch coupled between the at least one input and the output. The at least one series switch is adapted to selectively couple the input to the output in response to a first control signal. The band switch also includes at least one shunt switch coupled between the at least one input and a voltage node. The at least one shunt switch is adapted to selectively couple the at least one input to the voltage node in response to a second control signal. In addition, at least one notch filter is selectively coupled to the output in a shunt configuration, wherein the at least one notch filter is configured to attenuate signals within a stop band to attenuate harmonics and distortion.
摘要翻译： 公开了具有用于接收载波聚合的可切换陷波的带开关。 带开关具有至少一个输入和输出，其中至少一个串联开关耦合在至少一个输入和输出之间。 至少一个串联开关适于响应于第一控制信号选择性地将输入耦合到输出。 带开关还包括耦合在至少一个输入端和电压节点之间的至少一个并联开关。 所述至少一个并联开关适于响应于第二控制信号选择性地将所述至少一个输入耦合到所述电压节点。 此外，至少一个陷波滤波器在分流配置中选择性地耦合到输出，其中至少一个陷波滤波器被配置为衰减阻带内的信号以衰减谐波和失真。
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公开(公告)号：US08787215B1
公开(公告)日：2014-07-22
申请号：US12900056
申请日：2010-10-07
申请人： Nadim Khlat , Marcus Granger-Jones
发明人： Nadim Khlat , Marcus Granger-Jones
IPC分类号： H04J3/00
CPC分类号： H04B17/102 , H04B1/006 , H04B17/318 , H04Q2213/13098 , H04W84/06
摘要： An antenna tuner unit (ATU) that includes a T/R switch integrated with a receive only tuner circuit that is made up of a relatively tiny tuner circuitry is provided. The integration of the T/R switch with the receive only tuner circuit uses a microelectronics fabrication technology like silicon-on-insulator (SOI) with minimum cascading stages. As a result, the ATU of the present invention avoids a relatively complicated and expensive technology like Micro-electromechanical systems (MEMS). The ATU of the present disclosure is applicable to fourth generation (4G) standards like long term evolution time division duplex (LTE-TDD) or for a receiver diversity system such as a multiple-input and multiple-output (MIMO) system. The control of the receive only tuner circuit is accomplished via a relatively simple one-wire general input output (GPIO) thus allowing interface with most existing or future 4G transceiver products.
摘要翻译： 提供了一种天线调谐器单元（ATU），其包括与仅由相对小的调谐器电路组成的仅接收调谐器电路集成的T / R开关。 T / R开关与仅接收调谐器电路的集成使用微电子制造技术，如具有最小级联级的绝缘体上硅（SOI）。 结果，本发明的ATU避免了相对复杂和昂贵的技术，如微机电系统（MEMS）。 本公开的ATU适用于诸如长期演进时分双工（LTE-TDD）或诸如多输入和多输出（MIMO）系统的接收机分集系统的第四代（4G）标准。 仅接收调谐器电路的控制通过相对简单的单线通用输入输出（GPIO）实现，从而允许与大多数现有或未来的4G收发器产品的接口。
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公开(公告)号：US08705654B1
公开(公告)日：2014-04-22
申请号：US12901109
申请日：2010-10-08
CPC分类号： H03F3/195 , H03F1/3247 , H03F1/3282 , H03F3/24 , H04L27/0002
摘要： The present disclosure relates to RF circuitry having delay locked loop (DLL) circuitry that may be used to measure amplitude modulation-to-phase modulation (AMPM) distortion of an RF power amplifier during factory calibration or during real time operation of the RF circuitry. During a calibration mode, the DLL circuitry may be calibrated using a reference clock signal. During a phase measurement mode, the DLL circuitry may use the reference clock signal, which is representative of an RF input signal to the RF power amplifier, and a feedback signal, which is representative of an RF output signal from the RF power amplifier, to measure a phase difference between the RF input signal and the RF output signal. By measuring the phase difference at different amplitudes of the RF output signal, the AMPM distortion of the RF power amplifier may be determined and used to correct for the AMPM distortion.
摘要翻译： 本公开涉及具有延迟锁定环（DLL）电路的RF电路，其可以用于在工厂校准期间或在RF电路的实时操作期间测量RF功率放大器的幅度调制 - 相位调制（AMPM）失真。 在校准模式期间，可以使用参考时钟信号来校准DLL电路。 在相位测量模式期间，DLL电路可以使用表示到RF功率放大器的RF输入信号的参考时钟信号，以及代表来自RF功率放大器的RF输出信号的反馈信号， 测量RF输入信号和RF输出信号之间的相位差。 通过测量RF输出信号的不同幅度的相位差，可以确定RF功率放大器的AMPM失真并用于校正AMPM失真。
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公开(公告)号：US08633754B2
公开(公告)日：2014-01-21
申请号：US13549018
申请日：2012-07-13
申请人： Marcus Granger-Jones , Brad Nelson , Ed Franzwa
发明人： Marcus Granger-Jones , Brad Nelson , Ed Franzwa
IPC分类号： H03L5/00
CPC分类号： H03L5/00 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49112 , H01L2224/49113 , H01L2924/181 , H03H11/245 , H01L2924/00014 , H01L2924/00012
摘要： In one embodiment, a variable attenuator is disclosed having an attenuation circuit and a control circuit. The attenuation circuit may include a first series connected attenuation circuit segment and a shunt connected attenuation circuit segment, as well as additional attenuation circuit segments. Each attenuation circuit segment includes a stack of transistors that are coupled to provide the attenuation circuit segment with a variable impedance level having a continuous impedance range. In this manner, the control circuit may be operably associated with the stack of transistors in each attenuation circuit segment to control the variable attenuation level of the variable attenuator.
摘要翻译： 在一个实施例中，公开了一种具有衰减电路和控制电路的可变衰减器。 衰减电路可以包括第一串联连接的衰减电路段和分路连接的衰减电路段，以及附加的衰减电路段。 每个衰减电路段包括一堆晶体管，其被耦合以向衰减电路段提供具有连续阻抗范围的可变阻抗电平。 以这种方式，控制电路可以可操作地与每个衰减电路段中的晶体管堆叠相关联，以控制可变衰减器的可变衰减电平。
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公开(公告)号：US08509718B2
公开(公告)日：2013-08-13
申请号：US13171897
申请日：2011-06-29
IPC分类号： H04B1/18
CPC分类号： H04B1/18
摘要： An antenna tuner unit (ATU) that provides broadband tuning is disclosed. The disclosed ATU includes a radio frequency (RF) switch circuit having an N number of switch inputs, wherein N is a natural number equal to 2 or greater. An N number of reactance elements are coupled in series between an RF input and one of the N number of switch inputs. Taps between adjacent pairs of the N number of reactance elements, wherein each of the taps is coupled to a corresponding one of the N number of switch inputs. The ATU further includes a capacitive element for each of the taps, wherein each capacitive element is coupled between a corresponding one of the taps and a voltage node. In at least one embodiment, each of the capacitive elements is made up of a programmable capacitor array.
摘要翻译： 公开了提供宽带调谐的天线调谐器单元（ATU）。 所公开的ATU包括具有N个开关输入的射频（RF）开关电路，其中N是等于2或更大的自然数。 N个电抗元件在RF输入和N个开关输入中的一个之间串联耦合。 在N个电抗元件的相邻对之间的抽头，其中每个抽头耦合到N个开关输入中的对应的一个。 ATU还包括用于每个抽头的电容元件，其中每个电容元件耦合在相应的一个抽头和电压节点之间。 在至少一个实施例中，每个电容元件由可编程电容器阵列组成。
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公开(公告)号：US08509351B1
公开(公告)日：2013-08-13
申请号：US12895223
申请日：2010-09-30
IPC分类号： H03C3/00
CPC分类号： H03C5/00 , H03C2200/0058
摘要： The present disclosure relates to multi-mode RF circuitry using a single IQ modulator topology that may support different communication standards, including enhanced data rates for global system for mobile communications evolution (EDGE) and EDGE evolution by dividing certain modulation functions between a frequency synthesizer and an IQ modulator. Specifically, during a standard modulation mode, which may be used to support many communications standards, the frequency synthesizer provides an un-modulated RF carrier signal to the IQ modulator, which either phase modulates or phase and amplitude modulates the un-modulated RF carrier signal to provide a standard modulated RF signal. During a small signal polar modulation mode, which may be used to support the EDGE and EDGE evolution protocols, the frequency synthesizer provides a phase-modulated RF carrier signal to the IQ modulator, which may or may not amplitude modulate the phase-modulated RF carrier signal to provide a small signal polar modulated RF signal.
摘要翻译： 本公开涉及使用可以支持不同通信标准的单个IQ调制器拓扑的多模式RF电路，包括用于移动通信演进（EDGE）的全球系统的增强的数据速率和通过在频率合成器和 一个IQ调制器。 具体地说，在可用于支持许多通信标准的标准调制模式中，频率合成器向IQ调制器提供未调制的RF载波信号，IQ调制器可以对未调制的RF载波信号进行相位调制或相位和幅度调制 以提供标准的调制RF信号。 在可以用于支持EDGE和EDGE演进协议的小信号极化调制模式中，频率合成器向IQ调制器提供相位调制的RF载波信号，IQ调制器可以或可以不对相位调制的RF载波进行幅度调制 信号提供小信号极调调制RF信号。
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