公开(公告)号：US11949920B2

公开(公告)日：2024-04-02

申请号：US17871976

申请日：2022-07-24

Applicant: MEDIATEK INC.

Inventor： Ming-Hsien Lai ,  Min-Hao Chiu ,  Chia-Yun Cheng

IPC: H04N19/89 ,  H04N19/176 ,  H04N19/60 ,  H04N19/70

CPC classification number: H04N19/89 ,  H04N19/176 ,  H04N19/60 ,  H04N19/70

Abstract: A video decoding method includes: before residual decoding of a coding unit is completed, referring to available information to determine whether to decode information that an inverse transform (IT) circuit needs for applying inverse transform to transform blocks of the coding unit, and generating a determination result; and controlling coefficient transmission of the coding unit to the IT circuit according to the determination result.

公开(公告)号：US10659794B2

公开(公告)日：2020-05-19

申请号：US16293647

申请日：2019-03-06

Applicant: MEDIATEK INC.

Inventor： Chi-Min Chen ,  Min-Hao Chiu ,  Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04N19/124 ,  H04N19/186 ,  H04N19/182 ,  H04N19/91 ,  H04N19/157 ,  H04N19/44 ,  H04N19/119

Abstract: A palette decoding apparatus includes a palette color storage device which stores palette colors, a color index storage device which stores color indices of pixels, and a palette value processing circuit which generates a palette value for each pixel by reading data from the color index storage device and the palette color storage device. A frame is divided into first coding units, and each first coding unit is sub-divided into one or more second coding units. Before a palette value of a last pixel in a first coding unit is generated by the palette value processing circuit, a palette value of a non-last pixel in the first coding unit is generated by the palette value processing circuit and used by a reconstruction circuit of the video decoder.

公开(公告)号：US20190123833A1

公开(公告)日：2019-04-25

申请号：US16163581

申请日：2018-10-18

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04B10/69 ,  G06T9/00 ,  H04N19/70 ,  H04N19/184

Abstract: A decoding apparatus is used for decoding region of interest (ROI) regions in an image, and includes a storage device, a pre-processing circuit, a decoding circuit, and an information fetching circuit. The pre-processing circuit performs a syntax pre-parsing operation upon a bitstream to obtain necessary information of the ROI regions, and stores the necessary information into the storage device. The decoding circuit performs a decoding operation upon the bitstream to decode the ROI regions, wherein the decoding operation includes syntax parsing of the bitstream. The information fetching circuit reads and analyzes the necessary information, and delivers at least a portion of the necessary information to the decoding circuit. A processing time of obtaining necessary information of one ROI region at the pre-processing circuit overlaps a processing time of decoding another ROI region at the decoding circuit.

公开(公告)号：US10257524B2

公开(公告)日：2019-04-09

申请号：US15197741

申请日：2016-06-29

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Yung-Chang Chang

IPC: H04N19/18 ,  H04N19/50 ,  H04N19/426 ,  H04N19/436

Abstract: A residual up-sampling apparatus has a residual up-sampling buffer and a shared residual up-sampling circuit. The residual up-sampling buffer stores an intermediate residual up-sampling result. The shared residual up-sampling circuit employs a same processing kernel to perform a first-direction residual up-sampling operation and a second-direction residual up-sampling operation. The first-direction residual up-sampling operation processes an inverse transform output of an inverse transform circuit to generate the intermediate residual up-sampling result to the residual up-sampling buffer. The second-direction residual up-sampling operation performs transpose access upon the residual up-sampling buffer to retrieve the intermediate residual up-sampling result, and processes the intermediate residual up-sampling result to generate a final residual up-sampling result.

公开(公告)号：US20180295380A1

公开(公告)日：2018-10-11

申请号：US15832959

申请日：2017-12-06

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Chia-yun Cheng ,  Yung-Chang Chang

IPC: H04N19/513 ,  H04N19/55

CPC classification number: H04N19/521 ,  H04N19/52 ,  H04N19/55 ,  H04N19/573

Abstract: A method and apparatus for video encoding or decoding used by an AVS2 (Second Generation of Audio Video Coding Standard) video encoder or decoder respectively are disclosed. According to this method, first motion vectors associated with spatial neighboring blocks of a current block are determined. For each spatial neighboring block, a value of 1 is assigned to a first BlockDistance associated with the spatial neighboring block if a corresponding first reference picture is a G picture or GB picture. Motion vector predictor candidates are derived from the first motion vectors by scaling each first motion vector according to a corresponding first BlockDistance and a current BlockDistance. A final motion vector predictor is determined among the motion vector predictor candidates. The current motion vector is encoded or decoded using the final motion vector predictor

公开(公告)号：US20170019686A1

公开(公告)日：2017-01-19

申请号：US15209765

申请日：2016-07-14

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Yu-Chuan Wang ,  Yung-Chang Chang

IPC: H04N19/60 ,  H04N19/124 ,  H04N19/176 ,  H04N19/44

CPC classification number: H04N19/60 ,  H04N19/12 ,  H04N19/547 ,  H04N19/62 ,  H04N19/88

Abstract: A partial decoding circuit with inverse second transform has a transpose buffer, a first-direction inverse residual transform circuit, and a second-direction inverse residual transform circuit. The transpose buffer stores an intermediate inverse residual transform result. The first-direction inverse residual transform circuit processes an inverse quantization output to generate the intermediate inverse residual transform result to the transpose buffer. The second-direction inverse residual transform circuit accesses the transpose buffer to retrieve the intermediate inverse residual transform result, and processes the intermediate inverse residual transform result to generate a final inverse residual transform result, where the final inverse residual transform result of the inverse second transform is further processed by an inverse transform circuit. The first-direction inverse residual transform circuit and the second-direction inverse residual transform circuit process partial residual transform data of different process units in a parallel processing manner.

Abstract translation: 具有逆第二变换的部分解码电路具有转置缓冲器，第一方向逆残差变换电路和第二方向逆残差变换电路。 转置缓冲器存储中间逆残差变换结果。 第一方向逆残差变换电路处理逆量化输出以产生到转置缓冲器的中间逆残差变换结果。 第二方向逆残差变换电路访问转置缓冲器以检索中间逆残差变换结果，并处理中间逆残差变换结果以产生最终逆残差变换结果，其中反向第二变换的最终逆残差变换结果 被逆变换电路进一步处理。 第一方向逆残差变换电路和第二方向逆残差变换电路以并行处理方式处理不同处理单元的部分残差变换数据。

公开(公告)号：US20160241860A1

公开(公告)日：2016-08-18

申请号：US15139345

申请日：2016-04-27

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Chia-Yun Cheng ,  Chun-Chia Chen

IPC: H04N19/176 ,  H04N19/122 ,  H04N19/13 ,  H04N19/124

CPC classification number: H04N19/176 ,  H04N19/12 ,  H04N19/122 ,  H04N19/124 ,  H04N19/129 ,  H04N19/13

Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.

公开(公告)号：US20230122258A1

公开(公告)日：2023-04-20

申请号：US17871976

申请日：2022-07-24

Applicant: MEDIATEK INC.

Inventor： Ming-Hsien Lai ,  Min-Hao Chiu ,  Chia-Yun Cheng

IPC: H04N19/89 ,  H04N19/60 ,  H04N19/176 ,  H04N19/70

Abstract: A video decoding method includes: before residual decoding of a coding unit is completed, referring to available information to determine whether to decode information that an inverse transform (IT) circuit needs for applying inverse transform to transform blocks of the coding unit, and generating a determination result; and controlling coefficient transmission of the coding unit to the IT circuit according to the determination result.

公开(公告)号：US20230100895A1

公开(公告)日：2023-03-30

申请号：US17945115

申请日：2022-09-15

Applicant: MEDIATEK INC.

Inventor： Li-Ren Huang ,  Chia-Yun Cheng ,  Min-Hao Chiu ,  Hsueh-Yen Shen

IPC: H04N19/423 ,  G06F12/08

Abstract: A video processing circuit includes a first buffer and a computation circuit. Before a second one-dimensional processing operation is performed upon a plurality of consecutive blocks in a second direction, the first computation circuit generates a first processing result for each of the plurality of consecutive blocks by performing a first one-dimensional processing operation upon each of the plurality of consecutive blocks in a first direction that is different from the second direction, and further stores a plurality of first processing results of the plurality of consecutive blocks into the first buffer.

公开(公告)号：US20190281312A1

公开(公告)日：2019-09-12

申请号：US16293647

申请日：2019-03-06

Applicant: MEDIATEK INC.

Inventor： Chi-Min Chen ,  Min-Hao Chiu ,  Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04N19/186 ,  H04N19/182 ,  H04N19/119 ,  H04N19/157 ,  H04N19/44 ,  H04N19/91

Abstract: A palette decoding apparatus includes a palette color storage device which stores palette colors, a color index storage device which stores color indices of pixels, and a palette value processing circuit which generates a palette value for each pixel by reading data from the color index storage device and the palette color storage device. A frame is divided into first coding units, and each first coding unit is sub-divided into one or more second coding units. Before a palette value of a last pixel in a first coding unit is generated by the palette value processing circuit, a palette value of a non-last pixel in the first coding unit is generated by the palette value processing circuit and used by a reconstruction circuit of the video decoder.