Systems and Methods for Partially Conditioned Noise Predictive Equalization
    13.
    发明申请
    Systems and Methods for Partially Conditioned Noise Predictive Equalization 审中-公开
    部分条件噪声预测均衡的系统和方法

    公开(公告)号:US20140129603A1

    公开(公告)日:2014-05-08

    申请号:US14152917

    申请日:2014-01-10

    Abstract: Various embodiments of the present invention provide systems and methods for equalization. As an example, a circuit for data equalization is described that includes a 2N state detector circuit that provides a series of detected bits based upon a conditioned input, and a noise predictive filter having a plurality of taps and operable to provide at least a portion of the conditioned input. At least a first of the plurality of taps uses a first subset of the series of detected bits, and a second of the plurality of taps uses a second subset of the series of detected bits. The first subset of the detected bits includes one more bit than the second subset of the detected bits.

    Abstract translation: 本发明的各种实施例提供用于均衡的系统和方法。 作为示例,描述了用于数据均衡的电路,其包括2N状态检测器电路,其基于经调节的输入提供一系列检测到的位,以及具有多个抽头的噪声预测滤波器,并且可操作以提供至少一部分 条件输入。 所述多个抽头中的至少第一个抽头使用所述一系列检测到的位的第一子集,并且所述多个抽头中的第二个抽头使用所述一系列检测到的位的第二子集。 检测到的比特的第一子集比检测到的比特的第二子集多一个比特。

    ZERO GAIN START AND GAIN ACQUISITION BASED ON ADAPTIVE ANALOG-TO-DIGITAL CONVERTER TARGET
    14.
    发明申请
    ZERO GAIN START AND GAIN ACQUISITION BASED ON ADAPTIVE ANALOG-TO-DIGITAL CONVERTER TARGET 有权
    基于自适应模数转换器目标的零增益开始和增益收购

    公开(公告)号:US20140104717A1

    公开(公告)日:2014-04-17

    申请号:US13652706

    申请日:2012-10-16

    CPC classification number: G11B20/10027

    Abstract: Aspects of the disclosure pertain to a system and method for providing zero gain start (ZGS) and gain acquisition based on an adaptive analog-to-digital converter (ADC) target. The adaptive ADC target is used to collect channel characteristics and based on the adaptive ADC target, an adjusted 2T amplitude target value is generated.

    Abstract translation: 本公开的方面涉及用于基于自适应模数转换器(ADC)目标提供零增益开始(ZGS)和增益采集的系统和方法。 自适应ADC目标用于收集信道特性,并基于自适应ADC目标,产生调整后的2T幅度目标值。

    Soft decision assisted equalizer adaptation
    15.
    发明授权
    Soft decision assisted equalizer adaptation 有权
    软决策辅助均衡器适应

    公开(公告)号:US09288084B1

    公开(公告)日:2016-03-15

    申请号:US14259338

    申请日:2014-04-23

    Abstract: A data processing system includes an equalizer circuit operable to equalize digital data according to tap coefficients to yield equalized data, a tap coefficient adaptation circuit operable to adapt the tap coefficients based at least in part on a scaled error signal, a data detector operable to apply a data detection algorithm to the digital data to generate hard decisions and soft decisions, an error calculation circuit operable to calculate an error signal based on the equalized data and on the hard decisions, and a scaling circuit operable to scale the error signal based on the soft decisions to yield the scaled error signal.

    Abstract translation: 数据处理系统包括均衡器电路,其可操作以根据抽头系数对数字数据进行均衡以产生均衡的数据;抽头系数适配电路,用于至少部分地基于缩放的误差信号来调整抽头系数;数据检测器,可操作以应用 用于产生硬判决和软决策的数据检测算法,用于基于均衡数据和硬判决来计算误差信号的误差计算电路,以及可用于根据所述硬判决来缩放误差信号的缩放电路 产生缩放误差信号的软判决。

    Systems and methods for ATI characterization
    16.
    发明授权
    Systems and methods for ATI characterization 有权
    ATI表征的系统和方法

    公开(公告)号:US09281006B2

    公开(公告)日:2016-03-08

    申请号:US14148407

    申请日:2014-01-06

    CPC classification number: G11B20/10046 G11B20/10212

    Abstract: Systems, methods, devices, circuits for data processing, and more particularly to data processing including adjacent track interference detection and/or characterization.

    Abstract translation: 用于数据处理的系统,方法,设备,电路,更具体地涉及包括相邻轨道干扰检测和/或表征的数据处理。

    Zero phase start for array reader magnetic recording system
    17.
    发明授权
    Zero phase start for array reader magnetic recording system 有权
    阵列阅读器磁记录系统的零相启动

    公开(公告)号:US09196298B1

    公开(公告)日:2015-11-24

    申请号:US14320011

    申请日:2014-06-30

    Abstract: An apparatus includes an array reader with multiple of read heads operable to read a preamble pattern from a magnetic storage medium. A number of analog to digital converters are operable to sample an output of each of the read heads to generate digital data streams for the preamble pattern. A zero phase start calculation circuit is operable to calculate a phase offset between the digital data streams and to generate an integer phase adjustment signal and a fractional phase adjustment signal.

    Abstract translation: 一种装置包括具有多个读取头的阵列读取器,其可操作以从磁性存储介质读取前导码模式。 多个模数转换器可操作以对每个读取头的输出进行采样以产生用于前同步码模式的数字数据流。 零相位开始计算电路可用于计算数字数据流之间的相位偏移并产生整数相位调整信号和分数相位调整信号。

    Zero phase start estimation in readback signals
    19.
    发明授权
    Zero phase start estimation in readback signals 有权
    回读信号中的零相位起始估计

    公开(公告)号:US09123383B1

    公开(公告)日:2015-09-01

    申请号:US14197748

    申请日:2014-03-05

    CPC classification number: G11B20/1024 G11B20/10037

    Abstract: A data storage system identifies analog-to-digital conversion samples with amplitude below a certain threshold. Remaining samples are grouped according to phase into one or more quadrants. A multi-coordinate with overlapping quadrants is used to further differentiate sample points. The system then computes an average phase for zero phase start estimation.

    Abstract translation: 数据存储系统识别幅度低于某一阈值的模数转换样本。 剩余样品根据阶段分组成一个或多个象限。 使用具有重叠象限的多坐标来进一步区分采样点。 然后,该系统计算零相位开始估计的平均相位。

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