LED WITH STRESS-BUFFER LAYER UNDER METALLIZATION LAYER
    12.
    发明申请
    LED WITH STRESS-BUFFER LAYER UNDER METALLIZATION LAYER 有权
    LED在金属化层下的应力缓冲层

    公开(公告)号:US20160329468A1

    公开(公告)日:2016-11-10

    申请号:US14902001

    申请日:2014-06-23

    Abstract: Semiconductor LED layers are epitaxially gown on a patterned surface of a sapphire substrate (10). The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact (32) and an n-metal contact (33). A dielectric polymer stress-buffer layer (36) is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads (44, 45) are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

    Abstract translation: 半导体LED层在蓝宝石衬底(10)的图案化表面上是外延的。 图案化表面改善了光提取。 LED层包括p型层和n型层。 蚀刻LED层以露出n型层。 将一个或多个第一金属层图案化以与p型层和n型层电接触以形成p金属接触(32)和n-金属接触(33)。 电介质聚合物应力缓冲层(36)被旋涂在第一金属层上以在第一金属层上形成基本平坦的表面。 应力缓冲层具有暴露p金属接触和n-金属接触的开口。 金属焊盘(44,45)形成在应力缓冲层之上,并通过应力缓冲层中的开口与p-金属触点和n-金属触点电接触。 应力缓冲层用作缓冲器以适应焊盘和下层的CTE的差异。

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