METHOD OF MANUFACTURING A MULTI-CHANNEL HEMT
    11.
    发明申请
    METHOD OF MANUFACTURING A MULTI-CHANNEL HEMT 有权
    制造多通道HEMT的方法

    公开(公告)号:US20150221748A1

    公开(公告)日:2015-08-06

    申请号:US14689578

    申请日:2015-04-17

    摘要: A method of manufacturing a transistor device includes forming a semiconductor heterostructure including a plurality of alternating two-dimensional electron gasses (2DEGs) and two-dimensional hole gasses (2DHGs) extending in parallel at different depths in the semiconductor heterostructure, the 2DEGs forming current channels of the transistor device, forming a source extending into the semiconductor heterostructure in contact with the 2DEGs at a first end of the current channels, forming a drain extending into the semiconductor heterostructure in contact with the 2DEGs at an opposing second end of the current channels, and forming a plurality of spaced apart gate structures extending into the semiconductor heterostructure and including an electrically conductive material separated from the surrounding semiconductor heterostructure by an insulating material.

    摘要翻译: 一种制造晶体管器件的方法包括形成半导体异质结构,其包括在半导体异质结构中以不同深度平行延伸的多个交替的二维电子气体(2DEG)和二维空穴(2DHG),2DEG形成电流通道 形成在电流通道的第一端处延伸到与2DEG接触的半导体异质结构中的源,形成在当前通道的相对的第二端处延伸到与2DEG接触的半导体异质结构中的漏极, 以及形成延伸到半导体异质结构中的多个间隔开的栅极结构,并且包括通过绝缘材料与周围的半导体异质结构分离的导电材料。

    SEMICONDUCTOR DEVICE WITH FIELD ELECTRODE AND METHOD
    12.
    发明申请
    SEMICONDUCTOR DEVICE WITH FIELD ELECTRODE AND METHOD 有权
    具有场电极和方法的半导体器件

    公开(公告)号:US20140054697A1

    公开(公告)日:2014-02-27

    申请号:US14068583

    申请日:2013-10-31

    发明人: Oliver Haeberlen

    摘要: A semiconductor device with a field electrode and method. One embodiment provides a controllable semiconductor device including a control electrode for controlling the semiconductor device and a field electrode. The field electrode includes a number of longish segments which extend in a first lateral direction and which run substantially parallel to one another. The control electrode includes a number of longish segments extending in a second lateral direction and running substantially parallel to one another, wherein the first lateral direction is different from the second lateral direction.

    摘要翻译: 一种具有场电极和方法的半导体器件。 一个实施例提供了一种可控制的半导体器件,其包括用于控制半导体器件的控制电极和场电极。 场电极包括在第一横向方向上延伸并且基本上彼此平行地延伸的多个较长的段。 控制电极包括在第二横向方向上延伸并基本上彼此平行地延伸的多个长条,其中第一横向方向与第二横向方向不同。

    WATER AND ION BARRIER FOR III-V SEMICONDUCTOR DEVICES

    公开(公告)号:US20230163209A1

    公开(公告)日:2023-05-25

    申请号:US18100620

    申请日:2023-01-24

    摘要: A semiconductor device includes: a device formed in a III-V semiconductor body; metal layer(s) above the III-V semiconductor body; an interlayer dielectric adjacent each metal layer; vias electrically connecting each metal layer to the device formed in the III-V semiconductor body; a passivation layer touching and being supported by a top surface of the III-V semiconductor body, the lowermost interlayer dielectric touching and being supported by a top surface of the passivation layer, the passivation layer being an ineffective barrier against diffusion of water, water ions, sodium ions and potassium ions into the III-V semiconductor body; and a barrier interposed between a first oxide layer and a second oxide layer of the lowermost interlayer dielectric. The barrier is configured to prevent water, water ions, sodium ions and potassium ions from diffusing into the first oxide layer of the lowermost interlayer dielectric and which is immediately below the barrier.

    Semiconductor device
    18.
    发明授权

    公开(公告)号:US10153362B2

    公开(公告)日:2018-12-11

    申请号:US15336036

    申请日:2016-10-27

    摘要: In an embodiment, a semiconductor device includes an enhancement mode Group III-nitride-based High Electron Mobility Transistor (HEMT) including a drain, a gate, a barrier layer, a channel layer, a barrier layer arranged on the channel layer, and a heterojunction formed between the barrier layer and the channel layer and capable of supporting a two-dimensional electron gas (2DEG). At least one of a thickness and a composition of the barrier layer is configured to decrease a 2DEG density in a channel region compared with a 2DEG density outside of the channel region, wherein the channel region is arranged under the gate and extends a distance d beyond a drain-sided gate edge.