公开(公告)号：US20210159794A1

公开(公告)日：2021-05-27

申请号：US16902349

申请日：2020-06-16

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Young Kyun CHO ,  Heon Kook KWON ,  Kwang Seon KIM ,  Tae Joong KIM ,  Kwangchun LEE ,  Jung Nam LEE ,  Jae Ho JUNG

IPC: H02M3/158

Abstract: A direct current-to-direct current (DC-DC) converter providing multiple operation modes includes a buck power stage configured to lower an input voltage, a boost power stage configured to increase the input voltage, and a multi-mode controller configured to control the buck power stage and the boost power stage, wherein the multi-mode controller is configured to generate a signal to control the buck power stage and the boost power stage according to the input voltage and an output voltage, and control the buck power stage and the boost power stage using the signal.

公开(公告)号：US20150229274A1

公开(公告)日：2015-08-13

申请号：US14612801

申请日：2015-02-03

Applicant: Electronics and Telecommunications Research Institute

Inventor： Young Kyun CHO ,  Jae Ho JUNG ,  Kwangchun LEE

IPC: H03F1/02 ,  H03F3/45

CPC classification number: H03F1/083 ,  H03F3/45475 ,  H03F3/45941 ,  H03F2200/129 ,  H03F2200/153 ,  H03F2203/45114 ,  H03F2203/45424 ,  H03F2203/45521

Abstract: Provided is a fully differential signal system including a first amplification unit including first and second output terminals configured to output an output differential signal generated based on an input differential signal and a common mode feedback signal; a common mode detection unit configured to detect a common mode signal included in the output differential signal; a second amplification unit including a feedback signal output terminal configured to output the common mode feedback signal generated based on the detected common mode signal and a reference signal; a first stabilization unit connected between the first output terminal and the feedback signal output terminal; and a second stabilization unit connected between the second output terminal and the feedback signal output terminal. The fully differential signal system stably operates and an operation performance of the fully differential signal system is improved.

Abstract translation: 提供了一种全差分信号系统，包括：第一放大单元，包括第一和第二输出端子，第一和第二输出端子被配置为输出基于输入差分信号和共模反馈信号产生的输出差分信号; 共模检测单元，被配置为检测包括在所述输出差分信号中的共模信号; 第二放大单元，包括反馈信号输出端子，其被配置为输出基于检测到的共模信号产生的共模反馈信号和参考信号; 连接在第一输出端子和反馈信号输出端子之间的第一稳定单元; 以及连接在第二输出端子和反馈信号输出端子之间的第二稳定单元。 全差分信号系统稳定运行，提高了全差分信号系统的运行性能。

公开(公告)号：US20150214624A1

公开(公告)日：2015-07-30

申请号：US14596367

申请日：2015-01-14

Applicant: Electronics and Telecommunications Research Institute

Inventor： Heon Kook KWON ,  Jung Nam LEE ,  Byung Su KANG ,  Jung Hoon OH ,  Kwangchun LEE

IPC: H01Q9/04 ,  H01Q1/38 ,  H01Q1/52 ,  H04B1/04

CPC classification number: H01Q1/243 ,  H01Q1/42 ,  H01Q1/521 ,  H01Q9/0421 ,  H01Q21/28

Abstract: Provided is a micro base station antenna including a substrate etched with first and second micro strip lines, a first inverted F antenna, a second inverted F antenna facing the first inverted F antenna, and an isolator provided between the first inverted F antenna and the second inverted F antenna. According to the present invention, a micro base station antenna that has a wide bandwidth, a high gain, and an enhanced isolation characteristic can be provided.

Abstract translation: 提供了一种微基站天线，包括用第一和第二微带线蚀刻的基板，第一倒F天线，面向第一倒F天线的第二倒F天线，以及设置在第一倒F天线与第二倒F天线之间的隔离器 倒F天线。 根据本发明，可以提供具有宽带宽，高增益和增强的隔离特性的微型基站天线。

公开(公告)号：US20150200678A1

公开(公告)日：2015-07-16

申请号：US14308752

申请日：2014-06-19

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Young Kyun CHO ,  JAE HO JUNG ,  Kwangchun LEE

IPC: H03M1/00 ,  H03M3/00

CPC classification number: H03M3/448 ,  H03M1/00 ,  H03M1/12 ,  H03M3/30

Abstract: Provided is a delta-sigma modulator including a summer summing an input signal and an analog signal, a first integrator integrating an output signal from the summer and outputting a first integration signal, a second integrator integrating the first integration signal and outputting a second integration signal, a comparator comparing the second integration signal and a reference signal and outputting a digital signal according to the comparison result, and a digital-to-analog converter converting the digital signal into an analog signal in response to a clock signal and outputting the converted analog signal, wherein the second integrator operates based on an Nth order (where N is natural number of 1 or greater) transfer function.

Abstract translation: 提供了一种Δ-Σ调制器，其包括对输入信号和模拟信号进行加法求和，第一积分器，对来自加法器的输出信号进行积分并输出第一积分信号;第二积分器，积分第一积分信号并输出​​第二积分信号 比较比较第二积分信号和参考信号的比较器，并根据比较结果输出数字信号;以及数模转换器，响应于时钟信号将数字信号转换为模拟信号，并输出转换的模拟 信号，其中所述第二积分器基于N阶（其中N是1或更大的自然数）传递函数来操作。

公开(公告)号：US20150078500A1

公开(公告)日：2015-03-19

申请号：US14294836

申请日：2014-06-03

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung Jun LEE ,  Young Kyun CHO ,  Seunghyun JANG ,  Bong Hyuk PARK ,  JAE HO JUNG ,  Kwangchun LEE

IPC: H04L7/00

CPC classification number: H04L7/0016 ,  H04L27/366 ,  H04L27/02 ,  H04L27/361

Abstract: Provided is a method of correcting a time misalignment between envelope and phase components in a transmitting apparatus which separates envelope and phase components of a signal, processes them, and then recombines them to transmit the recombined signal. For this, in a method of correcting a time misalignment between envelope and phase components according to an embodiment of the present invention, a time misalignment is corrected by applying a time delay to at least one of envelope and phase components in digital and analog signal processing operations, or applying a time delay to an envelope or phase component by a pre-processing operation.

Abstract translation: 提供了一种校正发送装置中的包络和相位分量之间的时间偏移的方法，该发送装置分离信号的包络和相位分量，处理它们，然后将它们复合以发送重组信号。 为此，在根据本发明的实施例的校正包络和相位分量之间的时间失准的方法中，通过对数字和模拟信号处理中的包络和相位分量中的至少一个应用时间延迟来校正时间偏移 操作或通过预处理操作对信封或相位分量施加时间延迟。