NEUROMORPHIC ARITHMETIC DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20200226456A1

    公开(公告)日:2020-07-16

    申请号:US16742808

    申请日:2020-01-14

    Abstract: The neuromorphic arithmetic device comprises an input monitoring circuit that outputs a monitoring result by monitoring that first bits of at least one first digit of a plurality of feature data and a plurality of weight data are all zeros, a partial sum data generator that skips an arithmetic operation that generates a first partial sum data corresponding to the first bits of a plurality of partial sum data in response to the monitoring result while performing the arithmetic operation of generating the plurality of partial sum data, based on the plurality of feature data and the plurality of weight data, and a shift adder that generates the first partial sum data with a zero value and result data, based on second partial sum data except for the first partial sum data among the plurality of partial sum data and the first partial sum data generated with the zero value.

    PARALLEL PROCESSING DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20240202004A1

    公开(公告)日:2024-06-20

    申请号:US18361561

    申请日:2023-07-28

    Inventor: Joo Hyun LEE

    CPC classification number: G06F9/3885

    Abstract: Provided is a parallel processing device with one or more group processors, in which each of the one or more group processors includes a plurality of instance processors configured to process a kernel execution instance for a predetermined parallel program model-based kernel, each of the plurality of instance processors includes a register storing context reference information including an identifier of a group processor to which the instance processor belongs and an identifier of the instance processor, and each of the plurality of instance processors executes the kernel by reading execution context data, which is stored in a memory for execution of the kernel, using the context reference instance.

    NEUROMORPHIC ARITHMETIC DEVICE
    17.
    发明申请

    公开(公告)号:US20180232635A1

    公开(公告)日:2018-08-16

    申请号:US15804912

    申请日:2017-11-06

    CPC classification number: G06N3/0635 G06F5/01 G06F7/68 H03K19/20

    Abstract: The present disclosure relates to a neuromorphic arithmetic device. The neuromorphic arithmetic device may include first and second synapse circuits, a charging/discharging circuit, a comparator, and a counter. The first synapse circuit may generate a first current by performing a first multiplication operation on a first PWM signal and a first weight, and the second synapse circuit may generate a second current by performing a second multiplication operation on a second PWM signal and a second weight. The charging/discharging circuit may store charges induced by the first current and the second current in a charging period, and may discharge the charges in a discharging period. The comparator may compare a voltage level of the charges discharged in the discharging period and a level of a reference voltage. The counter may count output pulses of an oscillator on the basis of a result of the comparison by the comparator.

    METHOD AND APPARATUS FOR SERIAL BUS COMMUNICATION BASED ON ORTHOGONAL SIGNAL WAVEFORM
    18.
    发明申请
    METHOD AND APPARATUS FOR SERIAL BUS COMMUNICATION BASED ON ORTHOGONAL SIGNAL WAVEFORM 审中-公开
    基于正交信号波形的串行总线通信方法与装置

    公开(公告)号:US20160036608A1

    公开(公告)日:2016-02-04

    申请号:US14742421

    申请日:2015-06-17

    CPC classification number: H04L12/40 H04L25/4921

    Abstract: A first communication device is provided. The first communication device modulates data to generate a first data symbol. The first communication device generates a first signal by using a first signal waveform allocated among a plurality of mutually orthogonal signal waveforms and the first data symbol. The first communication device outputs the first signal to a serial line connected to a second communication device.

    Abstract translation: 提供第一通信设备。 第一通信设备调制数据以产生第一数据符号。 第一通信装置通过使用在多个相互正交的信号波形中分配的第一信号波形和第一数据符号来生成第一信号。 第一通信设备将第一信号输出到连接到第二通信设备的串行线路。

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