公开(公告)号：US08055931B2

公开(公告)日：2011-11-08

申请号：US12246123

申请日：2008-10-06

Applicant: Ralf Ludewig ,  Thuyen Le ,  Tilman Gloekler ,  Willm Hinrichs

Inventor： Ralf Ludewig ,  Thuyen Le ,  Tilman Gloekler ,  Willm Hinrichs

IPC: G06F1/04

CPC classification number: G06F1/12

Abstract: A method is provided for switching between two oscillator signals within an alignment element. In accordance with the method, one of the two oscillator signals one is selected as a first master signal in order to provide an output stepping signal at an output of the alignment element. The method comprises introducing a virtual stepping signal when a switch between the two oscillator signals occurs or when a failure in the first master signal is detected. The method further comprises sending the virtual stepping signal to the output of the alignment element in the event of a switch until an alignment with a new master signal is completed.

Abstract translation: 提供了一种用于在对准元件内的两个振荡器信号之间切换的方法。 根据该方法，选择两个振荡器信号之一作为第一主信号，以便在对准元件的输出处提供输出步进信号。 该方法包括当两个振荡器信号之间的开关发生时或当检测到第一主信号的故障时引入虚拟步进信号。 该方法还包括在开关的情况下将虚拟步进信号发送到对准元件的输出，直到与新的主信号的对准完成。

公开(公告)号：US20100182916A1

公开(公告)日：2010-07-22

申请号：US12357429

申请日：2009-01-22

Applicant: Christian Drewes ,  Markus Mueck ,  Thuyen Le ,  Hyung-Nam Choi

Inventor： Christian Drewes ,  Markus Mueck ,  Thuyen Le ,  Hyung-Nam Choi

IPC: H04L12/66 ,  H04B7/14

CPC classification number: H04W28/00 ,  H04B7/15521 ,  H04B7/2606 ,  H04L1/0017 ,  H04L1/004 ,  H04L2001/0097 ,  H04W24/02 ,  H04W88/04

Abstract: Embodiments are described that provide methods and radio networks that communicate data between a mobile communication device and a core network. The methods include using network coding to encode data, and communicating a subset of the encoded data between the mobile communication device and the core network through a dynamic relay station.

Abstract translation: 描述了提供在移动通信设备和核心网络之间传送数据的方法和无线电网络的实施例。 这些方法包括使用网络编码来对数据进行编码，以及通过动态中继站在移动通信设备和核心网络之间传送编码数据的子集。

公开(公告)号：US20080209245A1

公开(公告)日：2008-08-28

申请号：US12029636

申请日：2008-02-12

Applicant: Daniel Becker ,  Rafael Keggenhoff ,  Thuyen Le ,  Tobias Webel ,  Matthias Woehrle

Inventor： Daniel Becker ,  Rafael Keggenhoff ,  Thuyen Le ,  Tobias Webel ,  Matthias Woehrle

IPC: G06F1/06 ,  G06F1/32

CPC classification number: G06F11/3058 ,  G06F11/3024 ,  G06F11/3419 ,  G06F11/348

Abstract: Techniques for accounting microprocessor resource consumption. The present invention provides an automatic method to timely determine the current microprocessor clock frequency. Information provided by timer facilities of the microprocessor is reused by sampling this information at constant intervals. Such direct derivation of the microprocessor clock frequency is a real-time method that also takes into consideration secondary effects. Examples for such secondary effects include clock frequency variations across chips due to manufacturing variations, any degradation due to performance loss by thermal, or other detrimental effects as well as any voltage changes. In the preferred embodiment of the invention, the real-time microprocessor clock frequency determination is implemented as part of the microprocessor itself. No additional service processors or other external hardware facilities are needed in order to control the microprocessor clock frequency determination function.

Abstract translation: 用于会计微处理器资源消耗的技术。 本发明提供了一种能够及时确定当前微处理器时钟频率的自动方法。 由微处理器的定时器设备提供的信息通过以恒定的间隔对该信息进行采样来重用。 微处理器时钟频率的这种直接推导是一种也考虑到二次效应的实时方法。 这种二次效应的示例包括由于制造变化导致的芯片之间的时钟频率变化，由于热损耗导致的任何劣化或其他有害影响以及任何电压变化。 在本发明的优选实施例中，实时微处理器时钟频率确定被实现为微处理器本身的一部分。 为了控制微处理器的时钟频率确定功能，不需要附加的服务处理器或其他外部硬件设备。

公开(公告)号：US08514790B2

公开(公告)日：2013-08-20

申请号：US12357429

申请日：2009-01-22

Applicant: Christian Drewes ,  Markus Mueck ,  Thuyen Le ,  Hyung-Nam Choi

Inventor： Christian Drewes ,  Markus Mueck ,  Thuyen Le ,  Hyung-Nam Choi

IPC: H04W4/00 ,  H04L12/28

CPC classification number: H04W28/00 ,  H04B7/15521 ,  H04B7/2606 ,  H04L1/0017 ,  H04L1/004 ,  H04L2001/0097 ,  H04W24/02 ,  H04W88/04

Abstract: Embodiments are described that provide methods and radio networks that communicate data between a mobile communication device and a core network. The methods include using network coding to encode data, and communicating a subset of the encoded data between the mobile communication device and the core network through a dynamic relay station.

Abstract translation: 描述了提供在移动通信设备和核心网络之间通信数据的方法和无线电网络的实施例。 所述方法包括使用网络编码来对数据进行编码，以及通过动态中继站在移动通信设备和核心网络之间传送编码数据的子集。

公开(公告)号：US07877655B2

公开(公告)日：2011-01-25

申请号：US11855505

申请日：2007-09-14

Applicant: Thuyen Le ,  Thomas Pflueger ,  Martin Padeffke ,  Stefan Bonsels

Inventor： Thuyen Le ,  Thomas Pflueger ,  Martin Padeffke ,  Stefan Bonsels

IPC: G01R31/28

CPC classification number: G01R31/3187 ,  G01R31/318502

Abstract: A method for performing a test case with at least one LBIST engine on an integrated circuit with a plurality of storage elements and logic circuits interconnected according to a predetermined scheme. The LBIST engine is partially built up by storage elements and/or logic circuits. At least one scan chain is formed as a series of selected storage elements and the other storage elements are used for the LBIST engine or a part of said LBIST engine in a testing mode. The scan chain is driven by a test pattern and the LBIST test case is testing those parts of the logic circuits corresponding to the storage elements of said scan chain.

Abstract translation: 一种在具有根据预定方案互连的多个存储元件和逻辑电路的集成电路上的至少一个LBIST引擎执行测试用例的方法。 LBIST引擎部分由存储元件和/或逻辑电路构成。 至少一个扫描链形成为一系列所选择的存储元件，并且其它存储元件用于LBIST引擎或在测试模式中用于所述LBIST引擎的一部分。 扫描链由测试模式驱动，LBIST测试用例正在测试对应于所述扫描链的存储元件的逻辑电路的那些部分。

公开(公告)号：US07788432B2

公开(公告)日：2010-08-31

申请号：US12244430

申请日：2008-10-02

Applicant: Ralf Ludewig ,  Thuyen Le ,  Tobias Webel ,  Klaus Peter Gungl

Inventor： Ralf Ludewig ,  Thuyen Le ,  Tobias Webel ,  Klaus Peter Gungl

IPC: G06F13/00

CPC classification number: G06F13/4286

Abstract: The various embodiments described herein relate to a system for performing a serial communication between a central control block and a plurality of satellite components within a semiconductor chip. The system comprises at least one logical ring that serially connects the satellite components to the central control block. The system further comprises a centralized timer. The satellite components aid the system in obeying protocols and performing direct accesses to and/or from registers. The logical ring comprises at least one data channel that is provided for transmitting data packets and address packets. Single-envelope transactions are implemented. Errors of the satellite components associated with the single-envelope transactions are reported to the central control block as additional acknowledgement information.

Abstract translation: 这里描述的各种实施例涉及用于在中央控制块和半导体芯片内的多个卫星部件之间执行串行通信的系统。 该系统包括将卫星组件串行连接到中央控制块的至少一个逻辑环。 该系统还包括集中式定时器。 卫星组件帮助系统服从协议并执行对寄存器的访问和/或从寄存器的直接访问。 逻辑环包括提供用于发送数据分组和地址分组的至少一个数据信道。 实施单包络交易。 与单包络事务相关联的卫星组件的错误作为附加确认信息报告给中央控制块。

公开(公告)号：US20090228751A1

公开(公告)日：2009-09-10

申请号：US12125476

申请日：2008-05-22

Applicant: Tilman Gloekler ,  Christoph Jaeschke ,  Thuyen Le ,  Martin Padeffke

Inventor： Tilman Gloekler ,  Christoph Jaeschke ,  Thuyen Le ,  Martin Padeffke

IPC: G01R31/3177 ,  G06F11/25

CPC classification number: G01R31/318536 ,  G01R31/318547

Abstract: A method, structure and design system for performing logic built-in-self-test (LBIST) cycles on a semiconductor chip with a plurality of logic circuits and a plurality of storage elements connected serially to a number of LBIST stumps (pattern segments) between a pseudo-random-pattern generator (30) and a multiple-input-signature register. The semiconductor chip is subdivided into partitions, such that LBIST cycles may be run separately or in parallel for one or more partitions. The LBIST cycles may also be run separately or in parallel inter-connections between the partitions. The partitions to be tested are controlled by at least one corresponding clock signal, and the inter-connections to be tested are controlled by at least one corresponding clock signal.

Abstract translation: 一种用于在半导体芯片上执行逻辑内置自检（LBIST）周期的方法，结构和设计系统，其具有多个逻辑电路和多个存储元件，所述多个逻辑电路和多个存储元件串联连接到多个LBIST树桩（图案段）之间， 伪随机模式生成器（30）和多输入签名寄存器。 半导体芯片被细分为分区，使得LBIST周期可以针对一个或多个分区单独运行或并行运行。 LBIST循环也可以分开运行或在分区之间并行连接。 要测试的分区由至少一个对应的时钟信号控制，并且待测试的互连由至少一个相应的时钟信号控制。

公开(公告)号：US20090113094A1

公开(公告)日：2009-04-30

申请号：US12244430

申请日：2008-10-02

Applicant: Ralf Ludewig ,  Thuyen Le ,  Tobias Webel ,  Klaus Peter Gungl

Inventor： Ralf Ludewig ,  Thuyen Le ,  Tobias Webel ,  Klaus Peter Gungl

IPC: G06F13/00

CPC classification number: G06F13/4286

Abstract: The various embodiments described herein relate to a system for performing a serial communication between a central control block and a plurality of satellite components within a semiconductor chip. The system comprises at least one logical ring that serially connects the satellite components to the central control block. The system further comprises a centralized timer. The satellite components aid the system in obeying protocols and performing direct accesses to and/or from registers. The logical ring comprises at least one data channel that is provided for transmitting data packets and address packets. Single-envelope transactions are implemented. Errors of the satellite components associated with the single-envelope transactions are reported to the central control block as additional acknowledgement information.

Abstract translation: 这里描述的各种实施例涉及用于在中央控制块和半导体芯片内的多个卫星部件之间进行串行通信的系统。 该系统包括将卫星组件串行连接到中央控制块的至少一个逻辑环。 该系统还包括集中式定时器。 卫星组件帮助系统服从协议并执行对寄存器的访问和/或从寄存器的直接访问。 逻辑环包括提供用于发送数据分组和地址分组的至少一个数据信道。 实施单包络交易。 与单包络事务相关联的卫星组件的错误作为附加确认信息报告给中央控制块。

公开(公告)号：US07913136B2

公开(公告)日：2011-03-22

申请号：US12052844

申请日：2008-03-21

Applicant: Tilman Gloekler ,  Michael Kugel ,  Thuyen Le ,  Matthias Woehrle

Inventor： Tilman Gloekler ,  Michael Kugel ,  Thuyen Le ,  Matthias Woehrle

IPC: G01R31/28

CPC classification number: G01R31/31716 ,  G01R31/31855

Abstract: The present invention relates to a method for performing a logic built-in self-test (LBIST) on an electronic circuit with a plurality of logic circuits (18, 20, 22, 24) and storage elements (14, 16) connected serially to a number of LBIST stumps (10, 12) between a pseudo-random-pattern generator (26) and a multiple-input-signature register (28), wherein at least one constrained logic circuit (18) requires constrained values as input signals. Said method comprises the following steps: scanning the LBIST stumps (10, 12) with the pseudo-random-pattern generator (26), deactivating the multiple-input-signature register (28), performing a functional update in order to propagate legal values into those storage elements (16), which require constrained values, activating or resetting (51) the multiple-input-signature register (28), and setting or programming a start value in a counter (42) for activating a loop back circuit (34) in order to avoid an overwriting of the well-constrained values in the storage elements (16).

Abstract translation: 本发明涉及一种用于在电子电路上执行逻辑内置自检（LBIST）的方法，该电子电路具有多个逻辑电路（18,20,22,24）和串行连接到 伪随机模式生成器（26）和多输入签名寄存器（28）之间的多个LBIST树桩（10,12），其中至少一个约束逻辑电路（18）需要约束值作为输入信号。 所述方法包括以下步骤：用伪随机模式生成器（26）扫描LBIST树桩（10,12），去激活多输入签名寄存器（28），执行功能更新以便传播合法值 进入需要约束值的那些存储元件（16），激活或复位（51）多输入签名寄存器（28），以及在用于激活环回电路的计数器（42）中设置或编程起始值（ 34），以避免在存储元件（16）中覆盖良好约束的值。

公开(公告)号：US07778662B2

公开(公告)日：2010-08-17

申请号：US10933056

申请日：2004-09-02

Applicant: Attila Bilgic ,  Thuyen Le ,  Bernhard Rohfleisch

Inventor： Attila Bilgic ,  Thuyen Le ,  Bernhard Rohfleisch

IPC: H04M1/00

CPC classification number: G06F9/5027 ,  G06F2209/5017

Abstract: The processing of tasks in a mobile communication terminal that contains two or more microprocessors is disclosed. The processing rate of tasks is increased by redistribution of the tasks between the microprocessors as a function of the operating mode. Particularly in situations in which no conversation and/or no other type of payload signal transmission is taking place, tasks may be redistributed from the application processor to the modem processor and/or to the DSP, so that applications such as compression and/or decompression of video data can be processed more quickly.

Abstract translation: 公开了包含两个或多个微处理器的移动通信终端中的任务的处理。 通过作为操作模式的功能，微处理器之间的任务重新分配来增加任务的处理速度。 特别是在不进行会话和/或没有其他类型的有效载荷信号传输的情况下，任务可以从应用处理器重新分配到调制解调器处理器和/或DSP，使得诸如压缩和/或解压缩之类的应用 的视频数据可以更快地处理。