公开(公告)号：US20190122609A1

公开(公告)日：2019-04-25

申请号：US16051284

申请日：2018-07-31

Applicant: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Song LIU ,  Hengyu YAN ,  Boxiao LAN ,  Jinhui CHENG ,  Zhiming MENG ,  Chunbing ZHANG ,  Rui GUO ,  Hanzhang NIU ,  Jianzi HE

IPC: G09G3/3233 ,  G09G3/3258 ,  G09G3/3291

Abstract: A pixel driving circuit is provided, comprising: a current control circuit configured to provide a constant current signal and an activation signal, a current switching circuit configured to control the transmission of the constant current signal to a light-emitting device under the control of the activation signal, and a grounding control circuit configured to control the current control circuit to provide the constant current signal and the activation signal. An input terminal of the current control circuit is connected to a data line and a power line, respectively. A control terminal of the current switching circuit is connected to an output terminal of the current control circuit, an input terminal of the current switching circuit is connected to the input terminal of the current control circuit, and an output terminal of the current switching circuit s connected to an input terminal of the light-emitting device.

公开(公告)号：US20240423066A1

公开(公告)日：2024-12-19

申请号：US18267780

申请日：2022-03-07

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Junxiu DAI ,  Lu BAI ,  Yang ZHOU ,  Yi QU ,  Siyu WANG ,  Song LIU

IPC: H10K59/80

Abstract: The present disclosure provides a display panel (PNL), a motherboard structure, and a display device, and belongs to the field of display technologies. The display panel (PNL) has a display area (AA) and a peripheral area (BB) surrounding the display area (AA); and the peripheral area (BB) has an inner cut line (ICUT) surrounding the display area (AA). The motherboard structure includes a plurality of display panels (PNL), and the motherboard structure has a main cut line (MCUT) between the display panels (PNL). An outer cut line (OCUT) is disposed in at least a partial area between the main cut line (MCUT) and the inner cut line (ICUT) of the display panel (PNL); an end of the outer cut line (OCUT) is intersected with the inner cut line (ICUT); and a second crack dam (DAM2) is disposed between the outer cut line (OCUT) and the inner cut line (ICUT).

公开(公告)号：US20240268164A1

公开(公告)日：2024-08-08

申请号：US18022494

申请日：2022-04-29

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Lu BAI ,  Yang ZHOU ,  Yi QU ,  Junxiu DAI ,  Song LIU ,  Tinghua SHANG

IPC: H10K59/131 ,  G09G3/3233 ,  G11C19/28

CPC classification number: H10K59/131 ,  G09G3/3233 ,  G11C19/287 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0209

Abstract: Disclosed are a display substrate and a display apparatus, wherein the display substrate includes a display region and a non-display region which includes a rounded corner region; the display substrate includes a circuit structure layer including a pixel circuit and a control drive circuit; the circuit structure layer further includes a plurality of reset output lines and a plurality of reset transfer lines located in the non-display region and disposed on a side of the control drive circuit close to the display region, and an extension direction of the reset output line and an extension direction of the reset transfer line intersect; the reset transfer line is connected with the pixel circuit; an orthographic projection of at least one reset transfer line located in the rounded corner region on the base substrate is partially overlapped with orthographic projections of the plurality of reset output lines on the base substrate.

公开(公告)号：US20230043951A1

公开(公告)日：2023-02-09

申请号：US17790308

申请日：2021-08-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ke WANG ,  Zhanfeng CAO ,  Xinhong LU ,  Qi QI ,  Yan QU ,  Zhiwei LIANG ,  Yingwei LIU ,  Dapeng XUE ,  Guoqiang WANG ,  Jianguo WANG ,  Song LIU ,  Yongfei LI ,  Ting ZENG ,  Huan LIU ,  Wanru DONG ,  Heren GUI ,  Jian YANG ,  Haifeng HU ,  Yu JIANG ,  Peng XU ,  Weiwei CHU ,  Qi GAO

IPC: H01L33/62 ,  H01L25/075 ,  H01L21/48 ,  H01L23/498

Abstract: An array substrate and a manufacturing method therefor, a display panel, and a backlight module, are provided. The array substrate may comprise a base substrate, a metal wiring layer, a first planarization layer, an electrode layer, a second planarization layer, and a functional device layer stacked in sequence. The electrode layer comprises a metal sub-layer and a conductive sub-layer stacked on one side of the base substrate in sequence; the material of the metal sub-layer comprises a metal or a metal alloy; the conductive sub-layer has an oxidation resistance and covers the metal sub-layer . The functional device layer is disposed on the side of the second planarization layer distant from the base substrate, and comprises a plurality of functional devices electrically connected to the electrode layer.

公开(公告)号：US20220223773A1

公开(公告)日：2022-07-14

申请号：US17465689

申请日：2021-09-02

Applicant: BOE Technology Group Co., Ltd.

Inventor： Song LIU ,  Zhengliang LI ,  Kun ZHAO ,  Feifei LI ,  Qi QI

IPC: H01L33/62 ,  H01L25/075 ,  H01L33/56

Abstract: Disclosed are a light-emitting substrate and a display device. In the light-emitting substrate, a first pad of a light-emitting area includes a first metal layer located above a base substrate and a second metal layer located on a side, facing away from the base substrate, of the first metal layer. A material of the second metal layer includes copper-nickel-titanium alloy, and a quantity of nickel atoms and/or titanium atoms contained per unit area in a cross section, farther from the base substrate, of the second metal layer is greater than a quantity of nickel atoms and/or titanium atoms contained per unit area in another cross section, closer to the base substrate, of the second metal layer.

公开(公告)号：US20240363066A1

公开(公告)日：2024-10-31

申请号：US18029356

申请日：2022-06-21

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Song LIU ,  Yang ZHOU ,  Lu BAI ,  Junxiu DAI ,  Lingtong LI ,  Liheng WEI ,  Tianci CHEN

IPC: G09G3/3233 ,  G09G3/00 ,  G09G3/3266

CPC classification number: G09G3/3233 ,  G09G3/006 ,  G09G3/3266 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2330/023 ,  G09G2330/12

Abstract: A display substrate and a display device are provided, the display substrate includes a base substrate and a circuit structure layer disposed on the base substrate, the circuit structure layer includes a pixel circuit, a scan drive circuit, a control drive circuit and a buffer drive circuit; the pixel circuit includes a node reset transistor, a writing transistor, a reset signal line connected to a control electrode of the node reset transistor, a scan signal line connected to a control electrode of the writing transistor, and a control signal line; reset signal lines of pixel circuits of first to K-th rows are electrically connected with the buffer drive circuit, reset signal lines of pixel circuits of (K+1)-th to N-th row are electrically connected with the scan drive circuit or the control drive circuit.

公开(公告)号：US20240194123A1

公开(公告)日：2024-06-13

申请号：US17907936

申请日：2021-09-29

Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Junxiu DAI ,  Yang ZHOU ,  Lu BAI ,  Xin ZHANG ,  Yi QU ,  Siyu WANG ,  Song LIU

IPC: G09G3/32 ,  H01L25/075 ,  H01L25/16 ,  H01L27/12 ,  H01L33/62

CPC classification number: G09G3/32 ,  H01L25/0753 ,  H01L25/167 ,  H01L27/124 ,  H01L33/62 ,  G09G2310/0267 ,  G09G2320/0233

Abstract: A display substrate includes a first voltage line, an alternating current signal line and a second voltage line arranged on a substrate, the substrate includes a display region and a non-display region; the display substrate further includes a first conductive layer, a first insulation layer and a second conductive layer laminated one on another on the substrate, the first voltage line and the alternating current signal line are arranged on the first conductive layer, and the second voltage line is arranged on the second conductive layer; the first voltage line is lapped onto the second voltage line through a first groove penetrating through the first insulation layer; and an orthogonal projection of the second voltage line onto the substrate overlaps an orthogonal projection of the alternating current signal line onto the substrate at an overlapping region.

公开(公告)号：US20190317365A1

公开(公告)日：2019-10-17

申请号：US16343367

申请日：2018-08-02

Applicant: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Sen TAN ,  Sijun LEI ,  Liang GAO ,  Yansheng SUN ,  Hebing MA ,  Wei FU ,  Wencheng LUO ,  Qihai DU ,  Yuxu GENG ,  Qiangsheng HAN ,  Song LIU

IPC: G02F1/1335 ,  G02F1/1333

Abstract: A backlight module includes: light sources; a light guide plate disposed at a side of the light sources, the light guide plate including a second light guide portion disposed adjacent to the light sources and a first light guide portion disposed on a side of the second light portion away from the light sources, a thickness of the second light guide portion being greater than a thickness of the first light guide portion; and a back plate including a first back plate portion disposed at a side of the light sources away from the light guide plate and a second back plate portion disposed at a side of the light guide plate which is opposite to a light exit side of the light guide plate.