Abstract:
Embodiments of the present disclosure provide a preparation delivery assembly including: a first substrate, a second substrate, and at least two needles of different lengths, each of which is a hollow needle having a hollow structure; wherein two side walls are provided between the first substrate and the second substrate to define a first chamber for containing a preparation by the first substrate, the second substrate, and the two side walls; at least one first channel that is in communication with the first chamber is provided in the second substrate in a direction substantially perpendicular to the second substrate; and the needles are arranged on a surface of the second substrate distal to the first substrate, and each of the needles is in communication with the first chamber through the at least one first channel to deliver the preparation.
Abstract:
A display substrate, a manufacturing method thereof, and a display device are provided. According to embodiments of the present disclosure, the manufacturing method of a display substrate comprises: fabricating a gate electrode, a gate electrode insulating layer, and a semiconductor active layer sequentially on a base substrate; fabricating a first etching stopping layer and a second etching stopping layer on the base substrate with the semiconductor active layer fabricated thereon, wherein the first etching stopping layer is disposed in a display area of the display substrate, the second etching stopping layer is disposed in a peripheral area of the display substrate, and the second etching stopping layer is a non-transparent layer; and fabricating source/drain electrodes by a patterning process, on the base substrate with the first and second etching stopping layers fabricated thereon, wherein the second etching stopping layer is used as an alignment marker in fabricating the source/drain electrodes.
Abstract:
An array substrate, a display panel, and a display device. The array substrate has a display area and a non-display area surrounding the display area. The array substrate further includes a plurality of signal lines located in the display area, a plurality of test signal lines and a plurality of test control transistors located in the non-display area and respectively corresponding to the plurality of signal lines. Each of the signal lines is connected to a respective one of the test signal lines by a respective one of the test control transistors. The plurality of test control transistors each have a channel width-to-length ratio between 10 and 200.
Abstract:
A thin film transistor includes a gate, an active layer, a source, a drain. The source includes a connecting portion, a first sub-portion, a second sub-portion, and a third sub-portion that are arranged sequentially and in parallel. At first ends of the sub-portions, the connecting portion is connected to the portions to form two adjacent recesses. At second ends of the sub-portions, the distance from an end of the second sub-portion to the connecting portion is smaller than a distance from an end of the first sub-portion to the connecting portion and a distance from an end of the third sub-portion to the connecting portion. The drain includes a connecting block, a first drain and a second drain disposed in the two recesses respectively, and at least a portion of the connecting block is disposed between the first and the second drains to connect the first and the second drains.
Abstract:
A display processing method, a display processing device, and a display device are provided. The method includes acquiring a pixel signal, converting the pixel signal into a driving electrical signal base on a Gamma curve configured to compensate a corresponding color vision defect, outputting the driving electrical signal to a display panel, and displaying, by the display panel, an image based on the driving electrical signal.
Abstract:
The array substrate comprises a pixel electrode located in a pixel area and a common electrode corresponding to the pixel area; and a first passivation layer provided between the common electrode and the pixel electrode; wherein the pixel electrode comprises a plurality of strip-shaped first pixel electrodes and strip-shaped second pixel electrodes which are alternately arranged at intervals; and the common electrode comprises a plurality of strip-shaped common electrodes which are spaced from each other; wherein ends of the plurality of strip-shaped first pixel electrodes are connected to each other to form a comb shape, and ends of the plurality of strip-shaped second pixel electrodes are connected to each other to form a comb shape; and the comb-shaped first pixel electrode and the comb-shaped second pixel electrode are spaced from each other.
Abstract:
A voltage control method and device for electrodes, wherein the method includes inputting a varying voltage signal to common electrodes on an array substrate. The solution of the present application may avoid the problem of greenish picture of products due to influence of data line voltage on common electrodes.
Abstract:
A display device includes a display substrate including a display region and a bezel region surrounding the display region, a portion of bezel region serving as a binding region, the display substrate including a ground terminal; an opposite substrate opposite to the display substrate, the orthographic projection of opposite substrate exposes the binding region; the opposite substrate includes a black matrix, an electrostatic shielding layer; the black matrix includes a first opening of which the orthographic projection is in the bezel region, the first opening separates the black matrix in a first direction intersecting with the direction from the display region to the binding region; a conductive adhesive connecting the ground terminal and the electrostatic shielding layer, the orthographic projection of conductive adhesive is in the bezel region, the conductive adhesive in contact with the side of black matrix facing toward the binding region and perpendicular to the display substrate.
Abstract:
The present disclosure provides a display panel, including a display area and a bezel area surrounding the display area, edge lines of the display area and the bezel area are arc edge lines and matched with each other in shape, the display panel includes a peripheral circuit and peripheral signal lines, which are distributed in the bezel area, and further includes an array substrate and a color filter substrate which are not overlapped at edges thereof on a first side, and in a portion of the bezel area where the edges on the first side are not located, a distance between the peripheral signal line, closest to an outer edge of the bezel area, and the outer edge of the bezel area is in a range of 0.35±0.2 micrometers, the outer edge of the bezel area is an edge of the bezel area away from the display area.
Abstract:
A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels, a first power line and an electrical connection layer on the base substrate. Each sub-pixel includes a pixel circuit, and a plurality of sub-pixels are arranged in a plurality of rows and a plurality of columns along a first direction and a second direction. The sub-pixel is electrically connected with the light-emitting element through the electrical connection layer, and the portion, which is in the display region of the display substrate, of the electrical connection layer is not overlapped with the first power line in a direction perpendicular to the base substrate.