公开(公告)号：US20250029835A1

公开(公告)日：2025-01-23

申请号：US18770960

申请日：2024-07-12

Applicant: Applied Materials, Inc.

Inventor： Ryan Ley ,  Archana Kumar ,  Michel El Khoury Maroun ,  Benjamin D. Briggs

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/50 ,  H01J37/32

Abstract: Exemplary semiconductor processing methods may include performing a treatment operation on a substrate housed within a first processing region of a first semiconductor processing chamber. The methods may include providing a nitrogen-containing precursor to the first processing region. The methods may include forming plasma effluents of the nitrogen-containing precursor. The methods may include contacting the substrate with the plasma effluents of the nitrogen-containing precursor. The contacting may nitride a surface of the substrate. The methods may include transferring the substrate from the first processing region of the first semiconductor processing chamber to a second processing region of a second semiconductor processing chamber. The methods may include providing one or more deposition precursors to the second processing region. The methods may include contacting the substrate with the one or more deposition precursors. The contacting may deposit a layer of dielectric material on the substrate.

公开(公告)号：US12055821B2

公开(公告)日：2024-08-06

申请号：US17100400

申请日：2020-11-20

Applicant: Applied Materials, Inc.

Inventor： Lan Yu ,  Benjamin D. Briggs ,  Tyler Sherwood ,  Zihao Yang

IPC: H01L21/66 ,  G02F1/1339 ,  H01L21/67 ,  H01L23/522 ,  H01L23/532 ,  H01L29/423 ,  H01L31/20 ,  H01L33/46 ,  H10K59/50 ,  H10N10/855 ,  G02F1/1335 ,  G02F1/1362 ,  H01L21/311

CPC classification number: G02F1/13394 ,  H01L21/67207 ,  H01L21/67225 ,  H01L22/26 ,  H01L23/5226 ,  H01L23/53219 ,  H01L23/53276 ,  H01L29/42368 ,  H01L31/206 ,  H01L33/46 ,  H01L33/465 ,  H10K59/50 ,  H10N10/855 ,  G02F1/133553 ,  G02F1/136227 ,  G02F1/136277 ,  H01L21/31122 ,  H01L2224/05181 ,  H01L2224/05184

Abstract: Processing methods may be performed to form a pixel isolation structure on a semiconductor substrate. The method may include forming a pixel isolation bilayer on the semiconductor substrate. The pixel isolation bilayer may include a high-k layer overlying a stopping layer. The method may include forming a lithographic mask on a first region of the pixel isolation bilayer. The method may also include etching the pixel isolation bilayer external to the first region. The etching may reveal the semiconductor substrate. The etching may form the pixel isolation structure.

公开(公告)号：US20220165912A1

公开(公告)日：2022-05-26

申请号：US17100402

申请日：2020-11-20

Applicant: Applied Materials, Inc.

Inventor： Lan Yu ,  Benjamin D. Briggs ,  Tyler Sherwood ,  Raghav Sreenivasan

IPC: H01L33/00 ,  G02F1/1362 ,  H01L33/62

Abstract: Processing methods may be performed to form a pixel material in a semiconductor substrate. The methods may include forming a lithographic mask overlying the semiconductor substrate. The lithographic mask may include a window. The method may include forming a via in the semiconductor substrate by a dry etch process through the window. The method may also include forming the pixel material by depositing a fill material in the via.

公开(公告)号：US11881539B2

公开(公告)日：2024-01-23

申请号：US17100402

申请日：2020-11-20

Applicant: Applied Materials, Inc.

Inventor： Lan Yu ,  Benjamin D. Briggs ,  Tyler Sherwood ,  Raghav Sreenivasan

IPC: H01L33/00 ,  H01L33/62 ,  G02F1/1362

CPC classification number: H01L33/0095 ,  G02F1/136277 ,  H01L33/62 ,  H01L2933/0066

Abstract: Processing methods may be performed to form a pixel material in a semiconductor substrate. The methods may include forming a lithographic mask overlying the semiconductor substrate. The lithographic mask may include a window. The method may include forming a via in the semiconductor substrate by a dry etch process through the window. The method may also include forming the pixel material by depositing a fill material in the via.

公开(公告)号：US20220163846A1

公开(公告)日：2022-05-26

申请号：US17100422

申请日：2020-11-20

Applicant: Applied Materials, Inc.

Inventor： Lan Yu ,  Benjamin D. Briggs ,  Tyler Sherwood ,  Raghav Sreenivasan

IPC: G02F1/1335 ,  H01L21/768 ,  G02F1/1362 ,  H01L23/522

Abstract: Processing methods may be performed to forming a pixel material in a semiconductor structure. The methods may include forming a sacrificial hardmask overlying an uppermost layer of an optical stack of the semiconductor structure, the uppermost layer having a thickness. The methods may include forming a via through the sacrificial hardmask in the optical stack by a first etch process unselective to a metal layer of the semiconductor structure. The methods may include filling the via with a fill material, wherein a portion of the fill material extends over the sacrificial hardmask and contacts the metal layer. The methods may include removing a portion of the fill material external to the via by a removal process selective to the fill material. The methods may also include removing the sacrificial hardmask by a second etch process selective to the sacrificial hardmask while maintaining the thickness of the uppermost layer.