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公开(公告)号:US20170229490A1
公开(公告)日:2017-08-10
申请号:US15411724
申请日:2017-01-20
Applicant: Applied Materials, Inc.
Inventor: Xuena ZHANG , Dong-Kil YIM , Wenqing DAI , Harvey YOU , Tae Kyung WON , Hsiao-Lin YANG , Wan-Yu LIN , Yun-chu TSAI
CPC classification number: H01L29/4908 , G02F1/136213 , G02F1/1368 , H01L21/02148 , H01L21/02159 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02194 , H01L21/02274 , H01L21/0228 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/1259 , H01L27/3258 , H01L27/3262 , H01L27/3265 , H01L28/40 , H01L28/60 , H01L2227/323
Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor with high capacitance and low leakage as well as a good interface control for thin film transistor (TFT) applications. In one embodiment, a thin film transistor structure includes a capacitor formed in a thin film transistor device. The capacitor further includes a common electrode disposed on a substrate, a dielectric layer formed on the common electrode and a pixel electrode formed on the dielectric layer. An interface protection layer formed between the common electrode and the dielectric layer, or between the dielectric layer and the pixel electrode. A gate insulating layer fabricated by a high-k material may also be utilized in the thin film transistor structure.