TRANSACTION FLOW CONTROL USING CREDIT AND TOKEN MANAGEMENT
    11.
    发明申请
    TRANSACTION FLOW CONTROL USING CREDIT AND TOKEN MANAGEMENT 有权
    交易流量控制使用信贷和托管管理

    公开(公告)号:US20150026041A1

    公开(公告)日:2015-01-22

    申请号:US13944462

    申请日:2013-07-17

    Applicant: Apple Inc.

    CPC classification number: G06Q20/38 G06F17/5045 G06F17/505 G06Q20/24

    Abstract: Embodiments of a local interface unit are disclosed that may allow for managing credits and tokens as part of flow control method. The local interface unit may include a transmit unit and a receive unit. The transmit unit may be configured to receive credits and tokens, determine an available number of credits based on the number received tokens, determine an available number of tokens based on the number of received tokens, and send the available credits to an arbitration unit. The available credits may then be updated, by the transmit unit in response to receiving a selected transaction from the arbitration, and the transmit unit may then transmit the selected transaction, and update the available credits and the available tokens once the transaction has been sent. The receive unit may be configured to send credits and tokens to a transmit unit, and receive a transaction sent by a transmit unit.

    Abstract translation: 公开了本地接口单元的实施例,其可以允许作为流控制方法的一部分来管理信用和令牌。 本地接口单元可以包括发送单元和接收单元。 发送单元可以被配置为接收信用和令牌,基于所接收的令牌的数量来确定可用的信用数量,基于接收到的令牌的数量确定令牌的可用数量,并将可用信用发送到仲裁单元。 然后可以通过发送单元响应于从仲裁接收到所选择的交易而更新可用信用,并且发送单元然后可以发送所选择的交易,并且一旦交易被发送,就更新可用信用和可用令牌。 接收单元可以被配置为向发送单元发送信用和令牌,并且接收由发送单元发送的交易。

    QOS INBAND UPGRADE
    12.
    发明申请

    公开(公告)号:US20140181824A1

    公开(公告)日:2014-06-26

    申请号:US13721665

    申请日:2012-12-20

    Applicant: APPLE INC.

    CPC classification number: G06F13/14 G06F13/1642 G06F13/1673

    Abstract: Systems and methods for upgrading QoS levels of older transactions based on the presence of higher level QoS transactions in a given queue. A counter may be maintained to track the number of transactions in a queue that are assigned a corresponding QoS level. Each separate QoS level can have a corresponding counter. When a transaction is received by the queue, the counter corresponding to the QoS level of the transaction is incremented. When a transaction leaves the queue, the transaction is upgraded to the highest QoS level with a non-zero counter. Also, when the transaction leaves the queue, the counter corresponding to the original QoS level of the transaction is decremented.

    Abstract translation: 基于在给定队列中存在较高级别的QoS事务,升级旧事务的QoS级别的系统和方法。 可以维护计数器来跟踪被分配相应QoS级别的队列中的事务的数量。 每个单独的QoS级别可以有一个相应的计数器。 当队列接收到事务时,增加对应于事务的QoS级别的计数器。 当事务离开队列时,事务将使用非零计数器升级到最高的QoS级别。 此外,当事务离开队列时,对应于事务的原始QoS级别的计数器递减。

    Decoding Status Flag Techniques for Memory Circuits

    公开(公告)号:US20230325274A1

    公开(公告)日:2023-10-12

    申请号:US18323178

    申请日:2023-05-24

    Applicant: Apple Inc.

    CPC classification number: G06F11/1064 G06F11/076 G06F11/0772 G06F11/106

    Abstract: Techniques are disclosed relating to improving memory reliability. In some embodiments, memory circuitry includes memory cells configured to store data, interface circuitry, and on-die error correcting code (ECC) circuitry. The ECC circuitry may check read data from the memory cells for errors and correct detected correctable errors to generate corrected data. The memory circuitry may provide read data to a requesting circuit via the interface circuitry, including one or more sets of corrected data from the on-die ECC circuitry. The memory circuitry may provide a decoding status flag (DSF) via the interface circuitry, including to: set the DSF to a first value in response to no error being detected for a given set of provided read data, set the DSF to a second value in response to a correctable error that was detected and corrected by the on-die ECC circuitry to provide a given set of read data, and set the DSF to a third value in response to an uncorrectable error detected by the on-die ECC circuitry.

    Interfacing Dynamic Hardware Power Managed Blocks and Software Power Managed Blocks
    14.
    发明申请
    Interfacing Dynamic Hardware Power Managed Blocks and Software Power Managed Blocks 有权
    动态硬件电源管理块和软件电源管理块的接口

    公开(公告)号:US20140173307A1

    公开(公告)日:2014-06-19

    申请号:US13719535

    申请日:2012-12-19

    Applicant: APPLE INC.

    Abstract: A method and apparatus for interfacing dynamic hardware power managed blocks and software power managed blocks is disclosed. In one embodiment, and integrated circuit (IC) may include a number of power manageable functional units. The functional units maybe power managed through hardware, software, or both. Each of the functional units may be coupled to at least one other functional unit through a direct communications link. A link state machine may monitor each of the communications links between functional units, and may broadcast indications of link availability to the functional units coupled to the link. Responsive to a software request to shut down a given link, or a hardware initiated shutdown of one of the functional units coupled to the link, the link state machine may broadcast and indication that the link is unavailable.

    Abstract translation: 公开了用于接口动态硬件功率管理块和软件功率管理块的方法和装置。 在一个实施例中,集成电路(IC)可以包括多个功率可管理的功能单元。 功能单元可以通过硬件,软件或两者进行功率管理。 每个功能单元可以通过直接通信链路耦合到至少一个其它功能单元。 链路状态机可以监视功能单元之间的每个通信链路,并且可以将链路可用性的指示广播到耦合到链路的功能单元。 响应于关闭给定链路的软件请求或耦合到链路的功能单元之一的硬件启动关机,链路状态机可以广播并指示链路不可用。

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