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11.发明申请公开(公告)号：US20240405518A1
公开(公告)日：2024-12-05
申请号：US18679352
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
IPC: H01T4/10
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a spark gap device includes first and second conductive layers formed over a substrate, where the first and second conductive layers are electrically connected to first and second voltage nodes, respectively. The first conductive layer includes a plurality of arcing tips configured to form arcing electrode pairs with the second conductive layer to form an arc discharge in response to an EOS voltage between the first and second voltage nodes. The spark gap device further includes a series ballast resistor electrically connected between the arcing tips and the first voltage node, where the ballast resistor in formed in a metallization layer over the substrate and a resistance of the series ballast resistor is substantially higher than a resistance of the second conductive layer.
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公开(公告)号：US12055569B2
公开(公告)日：2024-08-06
申请号：US18317806
申请日：2023-05-15
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L23/60 , H01L23/62 , H01L27/02 , H02H9/00 , H02H9/04
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H01L23/5256 , H01L23/60 , H01L23/62 , H01L27/0288 , H02H9/00 , H02H9/042
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
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公开(公告)号：US20240159804A1
公开(公告)日：2024-05-16
申请号：US18419415
申请日：2024-01-22
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L23/60 , H01L23/62 , H01L27/02 , H02H9/00 , H02H9/04
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H01L23/5256 , H01L23/60 , H01L23/62 , H01L27/0288 , H02H9/00 , H02H9/042
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically are in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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公开(公告)号：US10979062B2
公开(公告)日：2021-04-13
申请号：US16858099
申请日：2020-04-24
Inventor： John P. Healy , Michael Hennessy , Naiqian Ren , Patrick Martin McGuinness , Robert A. Bombara
Abstract: This disclosure describes techniques to perform analog signal conditioning (including filtering and amplification) and analog-to-digital conversion (ADC) on a System-in-package (SIP) assembly technology. In particular, the disclosure combines a programmable gain amplifier (PGA), one or more filter circuits, and an ADC circuit onto the same SIP. These devices are coupled together on the SIP using high-accuracy and precise integrated-passive components. The SIP receives an analog signal, amplifies the analog signal with the PGA on the SIP, filters the amplified analog signal with the filter circuit(s) on the SIP, and then performs analog-to-digital conversion on the filtered amplified analog signal with the ADC circuit on the SIP. The SIP can be configured for various applications based on a variety of inputs and control mechanisms.
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15.发明申请公开(公告)号：US20250030237A1
公开(公告)日：2025-01-23
申请号：US18679379
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Stephen Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a vertical spark gap device includes a substrate having a horizontal main surface and a plurality of pairs of conductive layers over the horizontal main surface. Different ones of the pairs are separated by different vertical distances such that each pair serves as an arcing electrode pair and different ones of the arcing electrode pairs are configured to arc discharge at different voltages.
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Patent Agency Ranking
公开(公告)号：US20240405519A1
公开(公告)日：2024-12-05
申请号：US18679364
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a vertical spark gap device includes a substrate having a horizontal main surface, a first conductive layer and a second conductive layer each extending over the substrate and substantially parallel to the horizontal main surface while being separated in a vertical direction crossing the horizontal main surface. One of the first and second conductive layers is electrically connected to a first voltage node and the other of the first and second conductive layers is electrically connected to a second voltage node. The first and second conductive layers serve as one or more arcing electrode pairs and have overlapping portions configured to generate one or more arc discharges extending generally in the vertical direction in response to an EOS voltage signal received between the first and second voltage nodes.
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17.发明公开公开(公告)号：US20230375600A1
公开(公告)日：2023-11-23
申请号：US18317806
申请日：2023-05-15
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H02H9/04 , H01L27/02 , H01L23/60 , H01L23/62 , H01L23/525 , H02H9/00
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H02H9/042 , H01L27/0288 , H01L23/60 , H01L23/62 , H01L23/5256 , H02H9/00
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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公开(公告)号：US20230221360A1
公开(公告)日：2023-07-13
申请号：US18188363
申请日：2023-03-22
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
CPC classification number: H02J7/00712 , H02J7/0048 , H02J7/00032 , H02J7/0013 , H02J7/0029 , G08B21/185
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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公开(公告)号：US20230180390A1
公开(公告)日：2023-06-08
申请号：US18060472
申请日：2022-11-30
Inventor： Patrick Martin McGuinness , Joshua William Caldwell
CPC classification number: H05K1/181 , H01L28/20 , H01L25/16 , G01R1/203 , H01L27/0802 , H05K2201/10022 , H05K2201/10151 , H05K2201/10734
Abstract: Systems and methods for sense resistors are disclosed. In one aspect, an integrated sense resistor includes a plurality of first metal bumps alternating with a plurality of second metal bumps in at least a first lateral direction and a plurality of thin film resistors each disposed between and electrically connected to a pair of adjacent ones of first and second metal bumps. The integrated sense resistor can be configured for sensing a voltage developed by current flowing across the integrated sense resistor for determining a value of the current.
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公开(公告)号：US20220082605A1
公开(公告)日：2022-03-17
申请号：US17456307
申请日：2021-11-23
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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