公开(公告)号：US07910961B2

公开(公告)日：2011-03-22

申请号：US12247776

申请日：2008-10-08

Applicant: Duli Mao ,  Vincent Venezia ,  Hsin-Chih Tai ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Vincent Venezia ,  Hsin-Chih Tai ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L29/78 ,  H01L31/0232

CPC classification number: H01L27/1463

Abstract: A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but substantially not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but substantially not below the first plurality of color pixels.

Abstract translation: 彩色像素阵列包括第一，第二和第三多个彩色像素，每个彩色像素包括设置在第一半导体层内的感光区域。 在一个实施例中，包括深掺杂区域的第二半导体层设置在第一半导体层的下方。 深掺杂区域各自驻留在第一多个彩色像素中的对应的一个之下，但基本上不在第二和第三多个彩色像素的下方。 在一个实施例中，掩埋阱设置在第二和第三多个彩色像素之下，但基本上不在第一多个彩色像素的下方。

公开(公告)号：US07820498B2

公开(公告)日：2010-10-26

申请号：US12199737

申请日：2008-08-27

Applicant: Sohei Manabe ,  Hsin-Chih Tai ,  Vincent Venezia ,  Duli Mao ,  Yin Qian

Inventor： Sohei Manabe ,  Hsin-Chih Tai ,  Vincent Venezia ,  Duli Mao ,  Yin Qian

IPC: H01L21/00

CPC classification number: H01L27/14603 ,  H01L27/14625 ,  H01L27/1464 ,  H01L27/14683

Abstract: A backside illuminated imaging sensor includes a semiconductor having an imaging pixel that can include a photodiode region, an insulation layer, and a reflective layer. The photodiode is typically formed in the frontside of the semiconductor substrate. A surface shield layer can be formed on the frontside of the photodiode region. A light reflecting layer can be formed using silicided polysilicon on the frontside of the sensor. The photodiode region receives light from the back surface of the semiconductor substrate. When a portion of the received light propagates through the photodiode region to the light reflecting layer, the light reflecting layer reflects the portion of light received from the photodiode region towards the photodiode region. The silicided polysilicon light reflecting layer also forms a gate of a transistor for establishing a conductive channel between the photodiode region and a floating drain.

Abstract translation: 背面照明成像传感器包括具有可以包括光电二极管区域，绝缘层和反射层的成像像素的半导体。 光电二极管通常形成在半导体衬底的前侧。 表面屏蔽层可以形成在光电二极管区域的前侧。 可以使用传感器前侧的硅化多晶硅形成光反射层。 光电二极管区域从半导体衬底的后表面接收光。 当一部分接收的光通过光电二极管区域传播到光反射层时，光反射层将从光电二极管区域接收的光的一部分反射向光电二极管区域。 硅化多晶硅光反射层还形成晶体管的栅极，用于在光电二极管区域和浮置漏极之间建立导电沟道。

公开(公告)号：US20100084692A1

公开(公告)日：2010-04-08

申请号：US12247776

申请日：2008-10-08

Applicant: Duli Mao ,  Vincent Venezia ,  Hsin-Chih Tai ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Vincent Venezia ,  Hsin-Chih Tai ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L29/78 ,  H01L31/0232

CPC classification number: H01L27/1463

Abstract: A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but substantially not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but substantially not below the first plurality of color pixels.

Abstract translation: 彩色像素阵列包括第一，第二和第三多个彩色像素，每个彩色像素包括设置在第一半导体层内的感光区域。 在一个实施例中，包括深掺杂区域的第二半导体层设置在第一半导体层的下方。 深掺杂区域各自驻留在第一多个彩色像素中的对应的一个之下，但基本上不在第二和第三多个彩色像素的下方。 在一个实施例中，掩埋阱设置在第二和第三多个彩色像素之下，但基本上不在第一多个彩色像素的下方。

公开(公告)号：US20140014813A1

公开(公告)日：2014-01-16

申请号：US13547997

申请日：2012-07-12

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Yin Qian ,  Tiejun Dai ,  Howard E. Rhodes ,  Hongli Yang

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Yin Qian ,  Tiejun Dai ,  Howard E. Rhodes ,  Hongli Yang

IPC: H01L23/552 ,  H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469

Abstract: An integrated circuit system includes a first device wafer having a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer having a second semiconductor layer proximate to a second metal layer including a second conductor is disposed within a second metal layer oxide. A frontside of the first device wafer is bonded to a frontside of the second device wafer at a bonding interface. A conductive path couples the first conductor to the second conductor through the bonding interface. A first metal EMI shield is disposed in one of the first metal oxide layer and second metal layer oxide layer. The first EMI shield is included in a metal layer of said one of the first metal oxide layer and the second metal layer oxide layer nearest to the bonding interface.

Abstract translation: 集成电路系统包括具有靠近第一金属层的第一半导体层的第一器件晶片，第一金属层包括设置在第一金属层氧化物内的第一导体。 具有靠近包括第二导体的第二金属层的第二半导体层的第二器件晶片设置在第二金属层氧化物内。 第一器件晶片的前端在接合界面处结合到第二器件晶片的前侧。 导电路径通过接合界面将第一导体耦合到第二导体。 第一金属EMI屏蔽设置在第一金属氧化物层和第二金属层氧化物层之一中。 第一EMI屏蔽包括在最靠近接合界面的第一金属氧化物层和第二金属层氧化物层中的所述一个的金属层中。

公开(公告)号：US08569856B2

公开(公告)日：2013-10-29

申请号：US13288731

申请日：2011-11-03

Applicant: Yin Qian ,  Hsin-Chih Tai ,  Keh-Chiang Ku ,  Vincent Venezia ,  Duli Mao ,  Wei Zheng ,  Howard E. Rhodes

Inventor： Yin Qian ,  Hsin-Chih Tai ,  Keh-Chiang Ku ,  Vincent Venezia ,  Duli Mao ,  Wei Zheng ,  Howard E. Rhodes

IPC: H01L21/00

CPC classification number: H01L23/481 ,  H01L21/6835 ,  H01L23/522 ,  H01L24/05 ,  H01L27/14636 ,  H01L27/1464 ,  H01L2221/6835 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2924/00014 ,  H01L2924/12043 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

Abstract translation: 半导体器件的实施例包括半导体衬底和设置在半导体衬底中的至少从半导体衬底的第一侧至半导体衬底的第二侧延伸的空腔。 半导体器件还包括设置在半导体衬底的第一侧上并涂覆空腔的侧壁的绝缘层。 包括接合焊盘的导电层设置在绝缘层上。 导电层延伸到空腔中并且连接到设置在半导体衬底的第二侧下方的金属叠层。 贯穿硅通孔焊盘设置在半导体衬底的第二侧下方并连接到金属堆叠。 贯穿硅通孔焊盘的位置是接受硅通孔。

公开(公告)号：US20130092982A1

公开(公告)日：2013-04-18

申请号：US13273026

申请日：2011-10-13

Applicant: Gang Chen ,  Sing-Chung Hu ,  Hsin-Chih Tai ,  Duli Mao ,  Manoj Bikumandla ,  Wei Zheng ,  Yin Qian ,  Zhibin Xiong ,  Vincent Venezia ,  Keh-Chiang Ku ,  Howard E. Rhodes

Inventor： Gang Chen ,  Sing-Chung Hu ,  Hsin-Chih Tai ,  Duli Mao ,  Manoj Bikumandla ,  Wei Zheng ,  Yin Qian ,  Zhibin Xiong ,  Vincent Venezia ,  Keh-Chiang Ku ,  Howard E. Rhodes

IPC: H01L27/148 ,  H01L31/18 ,  H01L31/101

CPC classification number: H01L27/14616 ,  H01L27/14689

Abstract: Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate.

Abstract translation: 包括感光元件，浮动扩散区域和转印装置的图像传感器像素的实施例。 感光元件设置在基板层中，用于响应于光积累图像电荷。 浮动扩散区域设置在衬底层中以从感光元件接收图像电荷。 转移装置设置在感光元件和浮动扩散区域之间以选择性地将图像电荷从感光元件转移到浮动扩散区域。 传输装置包括掩埋沟道器件，其包括设置在掩埋沟道掺杂区域上的掩埋沟道栅极。 转移装置还包括表面通道装置，其包括设置在表面通道区域上的表面通道门。 表面通道装置与掩埋通道装置串联。 表面沟道栅极具有与掩埋沟道栅极相反的极性。

公开(公告)号：US08405748B2

公开(公告)日：2013-03-26

申请号：US12837870

申请日：2010-07-16

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

IPC: H04N3/14

CPC classification number: H04N5/3696 ,  H01L27/14621 ,  H01L27/1464 ,  H04N9/04

Abstract: Embodiments of an apparatus comprising a pixel array comprising a plurality of macropixels. Each macropixel includes a pair of first pixels each including a color filter for a first color, the first color being one to which pixels are most sensitive, a second pixel including a color filter for a second color, the second color being one to which the pixels are least sensitive and a third pixel including a color filter for a third color, the third color being one to which pixels have a sensitivity between the least sensitive and the most sensitive, wherein the first pixels each occupy a greater proportion of the light-collection area of the macropixel than either the second pixel or the third pixel. Corresponding process and system embodiments are disclosed and claimed.

Abstract translation: 包括包括多个宏像素的像素阵列的装置的实施例。 每个宏像素包括一对第一像素，每个第一像素包括用于第一颜色的滤色器，第一颜色是像素最敏感的一个，第二像素包括用于第二颜色的滤色器，第二颜色是 像素是最不灵敏的，并且第三像素包括用于第三颜色的滤色器，第三颜色是像素在最不灵敏和最敏感之间具有灵敏度的一个，其中第一像素每个占据较大比例的发光元件， 大小像素的收集区域比第二像素还是第三像素。 公开和要求保护相应的过程和系统实施例。

公开(公告)号：US08338856B2

公开(公告)日：2012-12-25

申请号：US12853803

申请日：2010-08-10

Applicant: Hsin-Chih Tai ,  Howard E. Rhodes ,  Wei Zheng ,  Vincent Venezia ,  Yin Qian ,  Duli Mao

Inventor： Hsin-Chih Tai ,  Howard E. Rhodes ,  Wei Zheng ,  Vincent Venezia ,  Yin Qian ,  Duli Mao

IPC: H01L31/0328

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14638

Abstract: A backside illuminated (“BSI”) complementary metal-oxide semiconductor (“CMOS”) image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.

Abstract translation: 背面照明（BSI）互补金属氧化物半导体（CMOS）图像传感器包括设置在半导体层和应力调整层内的感光区域。 感光区域对入射到BSI CMOS图像传感器背面的光敏感，以收集图像电荷。 应力调整层设置在半导体层的背面，以建立一种应力特性，该应力特性促使光生电荷载流子迁移到光敏区域。

公开(公告)号：US08330195B2

公开(公告)日：2012-12-11

申请号：US12967759

申请日：2010-12-14

Applicant: Vincent Venezia ,  Ashish Shah ,  Rongsheng Yang ,  Duli Mao ,  Yin Qian ,  Hsin-Chih Tai ,  Howard E. Rhodes

Inventor： Vincent Venezia ,  Ashish Shah ,  Rongsheng Yang ,  Duli Mao ,  Yin Qian ,  Hsin-Chih Tai ,  Howard E. Rhodes

IPC: H01L31/062

CPC classification number: H01L27/1463 ,  H01L27/14601

Abstract: An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type.

Abstract translation: 图像传感器像素包括基板，第一外延层，集电极层，第二外延层和光收集区域。 衬底被掺杂以具有第一导电类型。 第一外延层设置在衬底上并掺杂以具有第一导电类型。 集电极层选择性地设置在第一外延层的至少一部分上并被掺杂以具有第二导电类型。 第二外延层设置在集电极层上并掺杂以具有第一导电类型。 光收集区域收集光生电荷载流子并且设置在第二外延层内。 光收集区域也被掺杂以具有第二导电类型。

公开(公告)号：US20120302000A1

公开(公告)日：2012-11-29

申请号：US13566638

申请日：2012-08-03

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L31/0232

CPC classification number: H01L27/14698 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

Abstract: A technique for fabricating an image sensor including a pixel circuitry region and a peripheral circuitry region includes fabricating front side components on a front side of the image sensor. A dopant layer is implanted on a backside of the image sensor. A anti-reflection layer is formed on the backside and covers a first portion of the dopant layer under the pixel circuitry region while exposing a second portion of the dopant layer under the peripheral circuitry region. The first portion of the dopant layer is laser annealed from the backside of the image sensor through the anti-reflection layer. The anti-reflection layer increases a temperature of the first portion of the dopant layer during the laser annealing.

Abstract translation: 一种用于制造包括像素电路区域和外围电路区域的图像传感器的技术包括在图像传感器的正面上制造前侧部件。 掺杂剂层植入图像传感器的背面。 在背面形成防反射层，并且在像素电路区域下方覆盖掺杂剂层的第一部分，同时在外围电路区域下方暴露掺杂剂层的第二部分。 掺杂剂层的第一部分通过抗反射层从图像传感器的背面激光退火。 抗反射层在激光退火期间增加掺杂剂层的第一部分的温度。