Abstract:
A method for improving gate oxide thinning issue at trench corners is disclosed. The method comprises steps as follows. Firstly, a silicon substrate having a trench therein is provided. HDPCVD technology to form a first oxide layer on the sidewall and the bottom of the trench is carried out. After performing an etchback to leave the first oxide layer on the bottom of the trench, a second oxide layer is formed on the first oxide layer and on sidewalls of the trench by LPCVD technology. Thereafter, an isotropic etching is performed so as to remove a substantially portion of the second oxide layer and leave a remnant portion of second oxide layer on the trench corners. As a consequently, the trench corners are smooth. Finally, a thermal oxidation to form a third oxide layer on the sidewall of the trench is carried achieved to accomplish the gate oxide formation.
Abstract:
A method to prevent the formation of a thinner portion of insulating layer, especially a gate oxide layer, at the junction between the side walls and the bottom insulator is disclosed. First, a pad oxide layer is formed on the side walls and the bottom of the trench. Next, a bottom oxide is formed on the lower portion of the trench. Then, the upper portion of the bottom oxide and the exposed pad oxide layer are removed by wet etching to leave a bottom oxide having a concave surface. Next, the conformal gate oxide layer is grown on the exposed side walls of the trench.
Abstract:
A method for fabricating a metal-insulator-metal capacitor is described. A first metal layer is formed on a substrate. A plasma treatment is performed on the surface of the first metal layer. Then, a first oxide layer, a nitride layer and a second oxide layer are formed in sequence over the first metal layer. Thereafter, a second metal layer is formed on the second oxide layer. The second metal layer, the second oxide layer, the nitride layer, the first oxide layer and the first metal layer are defined to form the metal-insulator-metal capacitor.
Abstract:
A method for improving trench isolation is disclosed. A trench is etched into the substrate by using a photo mask. A bottom oxide layer, a sidewall oxide layer and a polycrystalline silicon layer are deposited into the trench and over the wafer, and are etched to clear from the surface, then over-etched till a recess is formed within the trench. Thereafter, an oxide etch step is applied to remove a certain thickness of the sidewall oxide layer in order to expose the polycrystalline silicon edge in the opening of the trench. Then, an oxidation step is utilized to form a capping oxide layer on top of the recess by oxidizing the top and the exposed edge of the polycrystalline silicon film in the trench so that a uniform plug edge can be achieved inside the trench to prevent stress problem induced by a wedge shaped oxide growing in the space between the plug and the substrate.
Abstract:
A method to prevent the formation of a thinner portion of insulating layer, especially a gate oxide layer, at the junction between the side walls and the bottom insulator is disclosed. First, a pad oxide layer is formed on the side walls and the bottom of the trench. Next, a bottom oxide is formed on the lower portion of the trench. Then, the upper portion of the bottom oxide and the exposed pad oxide layer are removed by wet etching to leave a bottom oxide having a concave surface. Next, the conformal gate oxide layer is grown on the exposed side walls of the trench.