公开(公告)号：US12148497B2

公开(公告)日：2024-11-19

申请号：US17898576

申请日：2022-08-30

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Tetsuro Takizawa

IPC: G11C29/52 ,  G11C13/00 ,  G11C29/00 ,  G11C29/20 ,  G11C29/04

Abstract: A semiconductor memory device includes: a plurality of banks having a data storage unit and an error correction code storage unit; an error correction code generation unit; an error correction unit; a row counter that determines a row address as a refresh target; a bank counter that determines a bank address as an error correction target; and a column counter that determines a column address as the error correction target. The error correction unit performs the error correction process on a data of an error correction target address determined based on the row counter, the bank counter, and the column counter when receiving a refresh command.

公开(公告)号：US12121996B2

公开(公告)日：2024-10-22

申请号：US18183307

申请日：2023-03-14

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Yuuki Inagaki ,  Yuji Ito ,  Yuki Ichihashi

IPC: B23K26/38 ,  B23K26/08 ,  B23K37/04 ,  G01C19/5691 ,  H03B5/02

CPC classification number: B23K26/38 ,  B23K26/0823 ,  B23K26/0869 ,  B23K37/0443 ,  G01C19/5691 ,  H03B5/02

Abstract: A method of manufacturing a micro-oscillator includes: preparing a substrate having a flat portion and a curved surface portion formed in a three-dimensional curved shape protruding from one surface of the flat portion, the curved surface portion being surrounded by the flat portion; and irradiating an outer surface of the curved surface portion with a laser beam to separate the curved surface portion from the flat portion.

公开(公告)号：US20240349611A1

公开(公告)日：2024-10-17

申请号：US18443624

申请日：2024-02-16

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation ,  Nisshinbo Micro Devices Inc.

Inventor： YUYA SAKURAI ,  HIDEO YAMADA ,  NAOKI MASUMOTO ,  HIROSHI TAKAHASHI ,  TAKASHI KAKEFUDA ,  TAKAHIDE USUI

IPC: H10N30/20 ,  H10N30/50 ,  H10N30/87

CPC classification number: H10N30/2042 ,  H10N30/503 ,  H10N30/872

Abstract: A piezoelectric element includes a substrate, a lower electrode arranged on the substrate, a piezoelectric film arranged on the lower electrode, and an upper electrode arranged on the piezoelectric film. Membrane portions are configured by the lower electrode, the piezoelectric film, and the upper electrode, and supported in a cantilever manner on the substrate, due to a recess formed in the substrate and a through hole penetrating the lower electrode, the piezoelectric film, and the upper electrode. At least two of the membrane portions have resonance frequencies different from each other.

公开(公告)号：US20240347521A1

公开(公告)日：2024-10-17

申请号：US18594334

申请日：2024-03-04

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Yoshitaka KATO ,  Takeshi ENDO ,  Hiroshi ISHINO

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/42

CPC classification number: H01L25/162 ,  H01L23/42 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/29139 ,  H01L2224/32225 ,  H01L2224/33181

Abstract: A semiconductor device includes a semiconductor module, a wiring substrate, a sealing member, and a thermal diffusion plate. The semiconductor module includes a semiconductor chip in which a semiconductor element is disposed. The wiring substrate is electrically connected to the semiconductor module. The sealing member seals the semiconductor module and the wiring substrate. The thermal diffusion plate is disposed between the semiconductor module and the wiring substrate, and has a thermal conductivity higher than a thermal conductivity of the sealing member. The thermal diffusion plate has a plate shape and is disposed in the sealing member in a state where a plane direction of the thermal diffusion plate is along a direction intersecting an arrangement direction of the semiconductor module and the wiring substrate.

公开(公告)号：US20240337044A1

公开(公告)日：2024-10-10

申请号：US18435218

申请日：2024-02-07

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： NOBUYUKI OYA ,  TAKESHI OKAMOTO ,  AKIYOSHI HORIAI

IPC: C30B23/00 ,  C30B29/36

CPC classification number: C30B23/002 ,  C30B29/36

Abstract: A silicon carbide single crystal includes a region in which a change of a specific resistance is repeated in a growth direction of the silicon carbide single crystal, and the change of the specific resistance is a gradual increase and decrease of the specific resistance. A changing range of the specific resistance may be within a range from 0.5% to 50% inclusive. A changing period of the gradual increase and decrease of the specific resistance that is repeated may be 500 μm or less in terms of a length of the silicon carbide single crystal.

公开(公告)号：US20240321951A1

公开(公告)日：2024-09-26

申请号：US18419973

申请日：2024-01-23

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Ryota SUZUKI

IPC: H01L29/06 ,  H01L21/04 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0634 ,  H01L21/046 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7813

Abstract: In a field effect transistor, trench lower layers are disposed directly below corresponding trenches. Deep layers of p-type extend along a first direction intersecting the trenches and are arranged at intervals along a second direction orthogonal to the first direction. A drain-side layer of n-type is distributed from a position in contact with a lower surface of a body layer to a position below a lower end of each of the deep layers through intervals between the deep layers. The drain-side layer includes a high concentration layer distributed in at least a part of a depth range in which both the deep layers and the trench lower layers are present, and an intermediate concentration layer distributed in at least a part of a depth range between a lower end of the high concentration layer and a lower end of each of the deep layers.

公开(公告)号：US20240304560A1

公开(公告)日：2024-09-12

申请号：US18520743

申请日：2023-11-28

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Kazuki KUWATA ,  Hiroshi ISHINO ,  Takeshi ENDO ,  Yoshitaka KATO

IPC: H01L23/538 ,  H01L21/56 ,  H01L21/60 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16

CPC classification number: H01L23/5386 ,  H01L21/56 ,  H01L21/60 ,  H01L23/3121 ,  H01L24/81 ,  H01L24/95 ,  H01L25/16 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/95 ,  H01L2924/10272 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1426

Abstract: A semiconductor device includes a first lead wire connected to a first connection target; a second lead wire connected to a second connection target; and a sealing resin that seals the first connection target, the second connection target, the first lead wire, and the second lead wire. The first lead wire includes a first connection portion connected to the first connection target, a first top portion exposed from the sealing resin, and a first standing portion connecting the first connection portion and the first top portion. The second lead wire includes a second connection portion connected to the second connection target, a second top portion exposed from the sealing resin, and a second standing portion connecting the second connection portion and the second top portion. The first top portion and the second top portion are disposed to face each other.

公开(公告)号：US20240297095A1

公开(公告)日：2024-09-05

申请号：US18418559

申请日：2024-01-22

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation ,  Taiyo Wire Cloth Co., Ltd. ,  Shikoku Instrumentation CO., LTD. ,  Monatec Co., Ltd.

Inventor： Shinya ITO ,  Tomohito IWASHIGE ,  Masayuki KAMIYA ,  Hiroki YOKOYAMA

IPC: H01L23/427

CPC classification number: H01L23/427

Abstract: A heat transport device includes a housing, a wick, and a vapor passage. The housing has a sealed space in which a working fluid is sealed. The wick forms a capillary passage through which a liquid-phase working fluid flows inside the housing. A gas-phase working fluid flows through the vapor passage inside the housing. An outer wall of the housing has a heating element disposing portion on which a heating element is disposed, and a non-disposing portion on which a heating element is not disposed. An internal portion of the housing has a heat receiving portion overlapping with the heating element disposing portion in a thickness direction of the housing and a heat radiating portion overlapping with the non-disposing portion in the thickness direction. Both the wick and the vapor passage are provided to extend over the heat receiving portion and the heat radiating portion.

公开(公告)号：US20240255975A1

公开(公告)日：2024-08-01

申请号：US18539388

申请日：2023-12-14

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： KOFI AFOLABI ANTHONY MAKINWA ,  ZHONG TANG

IPC: G05F1/56

CPC classification number: G05F1/561

Abstract: A reference current source includes first and second semiconductor elements, a conversion resistor, an amplifier, and a current mirror circuit. The first semiconductor element includes a single diode or a single transistor, and the second semiconductor element includes diodes or transistors connected in parallel. The conversion resistor converts forward voltages of the first and second semiconductor elements or a differential voltage between the first and second semiconductor elements into a converted current. The amplifier has first and second input terminals. The first semiconductor element is connected between the first input terminal and a ground, and the second semiconductor element and the conversion resistor is connected between the second input terminal and the ground. The current mirror circuit outputs a reference current corresponding to the converted current. The conversion resistor has a temperature coefficient being on a level with a temperature coefficient of the differential voltage.

公开(公告)号：US12027377B2

公开(公告)日：2024-07-02

申请号：US17535276

申请日：2021-11-24

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Shuhei Ichikawa ,  Hiroki Miyake

IPC: H01L21/425 ,  H01L29/66 ,  H01L29/872

CPC classification number: H01L21/425 ,  H01L29/66969 ,  H01L29/872

Abstract: A manufacturing method of a semiconductor device includes: preparing a semiconductor substrate including a first semiconductor layer made of gallium oxide containing Sn and a second semiconductor layer disposed on the first semiconductor layer and made of n type gallium oxide having a Sn concentration lower than a Sn concentration of the first semiconductor layer; implanting ions of a group 2 element into the second semiconductor layer; and forming a diffusion region, in which the group 2 element diffuses, in a range from a surface of the second semiconductor layer to an interface between the second semiconductor layer and the first semiconductor layer.