Circuit arrangement, systems for transmitting a serial data stream, pixel matrix display and method for transmitting a serial data stream
    12.
    发明授权
    Circuit arrangement, systems for transmitting a serial data stream, pixel matrix display and method for transmitting a serial data stream 有权
    电路布置,用于发送串行数据流的系统,像素矩阵显示和用于发送串行数据流的方法

    公开(公告)号:US08953630B2

    公开(公告)日:2015-02-10

    申请号:US12831285

    申请日:2010-07-07

    摘要: A circuit arrangement comprises an input circuit for reading in a serial data stream, which comprises a plurality of useful data bits, and for reading in a piece of information which indicates the start of the serial data stream. The circuit arrangement also comprises a data processing circuit for removing at least one useful data bit from the read-in, serial data stream. The data processing circuit is designed such that it removes the at least one useful data bit at a prescribed position after the start of the serial data stream. The circuit arrangement also comprises a first output circuit for outputting the read-in, serial data stream for the omission of the at least one removed useful data bit.

    摘要翻译: 电路装置包括用于读取串行数据流的输入电路,其包括多个有用的数据位,并用于读取指示串行数据流的开始的一条信息。 该电路装置还包括用于从读入串行数据流中移除至少一个有用数据位的数据处理电路。 数据处理电路被设计为使得在串行数据流开始之后它在规定位置移除该至少一个有用数据位。 电路装置还包括用于输出用于省略至少一个移除的有用数据位的读入串行数据流的第一输出电路。

    ADC with noise-shaping SAR
    13.
    发明授权
    ADC with noise-shaping SAR 有权
    ADC具有噪声整形SAR

    公开(公告)号:US08947285B2

    公开(公告)日:2015-02-03

    申请号:US13795347

    申请日:2013-03-12

    IPC分类号: H03M1/38 H03M1/06

    CPC分类号: H03M3/418 H03M3/46

    摘要: Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator.

    摘要翻译: 设备和技术的代表性实现提供模拟输入的模数转换。 使用前馈技术的多级比较器可以提供转换误差的噪声整形。 例如,比较器可以将转换错误从第一级向下馈送到多级比较器的下一级。

    Frequency dividers
    15.
    发明授权
    Frequency dividers 有权
    分频器

    公开(公告)号:US08917122B1

    公开(公告)日:2014-12-23

    申请号:US14019875

    申请日:2013-09-06

    发明人: Heiko Koerner

    CPC分类号: H03K21/026 H03K21/10

    摘要: Various embodiments relate to frequency dividers. A current of a current source of the frequency divider is controlled based on a property of an output signal of the frequency divider.

    摘要翻译: 各种实施例涉及分频器。 基于分频器的输出信号的特性来控制分频器的电流源的电流。

    Programmable switching for switched capacitor DC-DC converter
    16.
    发明授权
    Programmable switching for switched capacitor DC-DC converter 有权
    开关电容器DC-DC转换器的可编程开关

    公开(公告)号:US08861233B2

    公开(公告)日:2014-10-14

    申请号:US13283560

    申请日:2011-10-27

    IPC分类号: H02M3/07 H02M1/00

    摘要: A method and apparatus for regulating a dc-dc converter wherein a plurality of switches are arranged with respect to an energy storage device and an output capacitor. An impedance of one or more of the plurality of switches may be adjusted by altering a non-zero voltage provided to the one or more of the plurality of switches, the altering may be based on a slope control signal output by a multiplexer that receives a signal representing a conductance value of the one or more of the plurality of switches.

    摘要翻译: 一种用于调节dc-dc转换器的方法和装置,其中相对于能量存储装置和输出电容器布置有多个开关。 可以通过改变提供给多个开关中的一个或多个开关的非零电压来调节多个开关中的一个或多个的阻抗,该改变可以基于由多路复用器输出的斜率控制信号,该多路复用器接收 表示多个开关中的一个或多个的电导值的信号。

    Voltage regulator with differentiating and amplifier circuitry
    17.
    发明授权
    Voltage regulator with differentiating and amplifier circuitry 有权
    具有差分放大器电路的稳压器

    公开(公告)号:US08803493B2

    公开(公告)日:2014-08-12

    申请号:US13106987

    申请日:2011-05-13

    IPC分类号: G05F1/00

    CPC分类号: G05F1/46

    摘要: The invention relates to a voltage regulator having a differentiating circuit and an amplifier, the differentiating circuit being designed to detect a voltage at the voltage regulator connection and to provide it as a differentiated signal at its differentiating output, and the amplifier being designed to inject a compensation signal dependent on the differentiated signal into an input connection of an output circuit of the voltage regulator.

    摘要翻译: 本发明涉及一种具有微分电路和放大器的电压调节器,该微分电路设计成检测电压调节器连接处的电压,并将其作为微分信号在其微分输出端提供,并且该放大器被设计为注入 补偿信号取决于微分信号进入稳压器输出电路的输入连接。

    Low-dropout regulator overshoot control
    18.
    发明授权
    Low-dropout regulator overshoot control 有权
    低压差稳压器过冲控制

    公开(公告)号:US08797008B2

    公开(公告)日:2014-08-05

    申请号:US13344890

    申请日:2012-01-06

    申请人: Sachin Devegowda

    发明人: Sachin Devegowda

    IPC分类号: G05F1/56 G05F1/565 G05F1/575

    CPC分类号: G05F1/573

    摘要: Representative implementations of devices and techniques control regulator output overshoot. An offset signal is provided to a component of the regulator during at least a portion of the regulator start-up.

    摘要翻译: 设备和技术的代表性实现控制调节器输出过冲。 在调节器启动的至少一部分期间,将偏移信号提供给调节器的部件。

    Method and arrangement for streaming data profiling
    19.
    发明授权
    Method and arrangement for streaming data profiling 失效
    流数据分析的方法和布置

    公开(公告)号:US08719481B2

    公开(公告)日:2014-05-06

    申请号:US13245899

    申请日:2011-09-27

    申请人: Kay Hesse

    发明人: Kay Hesse

    IPC分类号: G06F13/14 G06F13/38

    CPC分类号: G06F13/385 G06F11/349

    摘要: A circuit arrangement includes a plurality of functional units each of which comprises a plurality of data processing modules and a local controller. The plurality of data processing modules run a common system clock and are connected by a streaming data bus running a handshake-type streaming data transfer protocol. A profiling module of the circuit arrangement assesses control signals tapped at predefined interfaces of the streaming data bus during real time operation, for determining link performance and communication patterns for profiling and debugging purposes, and hence constitutes a simple and low cost approach for assessing intra-component and inter-component link performance and communication patterns on large SoCs. A method for profiling data flow for use in such a circuit arrangement is also provided.

    摘要翻译: 电路装置包括多个功能单元,每个功能单元包括多个数据处理模块和本地控制器。 多个数据处理模块运行公共系统时钟,并通过运行握手型流数据传输协议的流数据总线进行连接。 电路装置的分析模块评估在实时操作期间在流数据总线的预定接口处被抽头的控制信号,用于确定用于分析和调试目的的链路性能和通信模式,并且因此构成用于评估帧内编码的简单和低成本的方法, 组件和组件间链路性能和大型SoC上的通信模式。 还提供了一种用于对这种电路装置使用的数据流进行分析的方法。

    Phase-lock loop
    20.
    发明授权
    Phase-lock loop 有权
    锁相环路

    公开(公告)号:US08704563B2

    公开(公告)日:2014-04-22

    申请号:US13347586

    申请日:2012-01-10

    IPC分类号: H03L7/087

    摘要: In one implementation an output signal of an oscillator is varied to be within a desired frequency band with respect to a reference signal, the output signal having a plurality of phases. The implementation may include comparing the output signal with the reference signal, counting falling edges about each phase of the number of phases in a predetermined time period and summing to define a count output; comparing the count output with a product of the number of phases of the output signal and the factor to define a comparison, generating a control signal based upon the comparison, and inputting the control signal to the oscillator to alter the output signal thereof.

    摘要翻译: 在一个实现中,振荡器的输出信号相对于参考信号变化在期望的频带内,输出信号具有多个相位。 该实现可以包括将输出信号与参考信号进行比较,对在预定时间段内的相位数的每个相位的下降沿进行计数,并且相加以定义计数输出; 将计数输出与输出信号的相位数和因子的乘积进行比较以定义比较,基于比较生成控制信号,并将控制信号输入到振荡器以改变其输出信号。