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公开(公告)号：US11798509B2
公开(公告)日：2023-10-24
申请号：US17602243
申请日：2020-04-10
发明人： Hiroyoshi Ichikura
CPC分类号： G09G3/3648 , G09G3/20 , G09G3/3677 , G09G3/3688 , G09G2310/0275 , G09G2310/0297 , G09G2310/08
摘要： A display driver drives a display device including a plurality of data lines and a demultiplexer. The demultiplexer includes a plurality of first switches connected to the respective plurality of data lines, and a series of driving voltages including a plurality of driving voltages is supplied via a first wiring. The demultiplexer supplies the plurality of driving voltages to the respective plurality of data lines via the plurality of first switches. The display driver includes: a voltage multiplexing part that generates the series of driving voltages; a second switch connected between the voltage multiplexing part and the first wiring; and a controller connected to the plurality of first switches and the second switch. The controller switches the second switch from an on state to an off state during a first period and sets the two first switches corresponding to the two data lines to the on state such that the two data lines and the first wiring are connected during a second period that is a part of the first period and in which the second switch is in the off state.
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12.发明公开公开(公告)号：US20230274575A1
公开(公告)日：2023-08-31
申请号：US18113159
申请日：2023-02-23
发明人： KAZUNORI FUJIWARA
IPC分类号： G06V40/14 , G06V10/60 , G06V10/145
CPC分类号： G06V40/14 , G06V10/60 , G06V10/145 , G06V2201/03
摘要： A blood vessel judgment device acquires an image captured while near-infrared light is illuminated at a part of a body. Based on brightness values of a plurality of pixels configuring the acquired image, the blood vessel determination device determines that a predetermined number of pixels counted in order of brightness value from a pixel with a lowest brightness value represent blood vessels.
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公开(公告)号：US11728815B2
公开(公告)日：2023-08-15
申请号：US17537101
申请日：2021-11-29
发明人： Junya Ogawa , Katsuaki Matsui
摘要： A semiconductor device outputs, as an output signal synchronized to a phase-locked loop clock signal, a synchronized input signal that is synchronized to a reference clock signal of a phase-locked loop circuit. The semiconductor device includes the phase-locked loop circuit, a first flip-flop that receives the input signal in synchronization with the reference clock signal on the basis of a feedback signal inputted to a phase comparator of the phase-locked loop circuit 10, and a second flip-flop that receives an output from the first flip-flop on the basis of the phase-locked loop clock signal. The second flip-flop outputs the output from the first flip-flop as the output signal. A setup time to synchronize the input signal to the phase-locked loop clock signal is set to one half of a period of the reference clock signal.
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公开(公告)号：US11726356B2
公开(公告)日：2023-08-15
申请号：US17676231
申请日：2022-02-21
发明人： Hiroshi Tsuchi
CPC分类号： G02F1/13306 , G09G3/3614 , G09G3/3688
摘要： An output circuit is provided, including: a positive polarity voltage signal supplying circuit to supply or block the supply of a positive polarity voltage signal having a voltage higher than a reference power source voltage to a first node; a negative polarity voltage signal supplying circuit to supply or block the supply of a negative polarity voltage signal having a voltage lower than the reference power source voltage to a second node; a first switch of which a source is connected to the first node and a drain is connected to a first output terminal; a second switch of which a source is connected to the second node and a drain is connected to the first output terminal; and third and fourth switches; a first and a second voltage control circuits respectively performing on-off control of the first and second switches.
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公开(公告)号：US11664314B2
公开(公告)日：2023-05-30
申请号：US16817579
申请日：2020-03-12
发明人： Masanori Shindo
IPC分类号： H01L21/48 , H01L23/532 , H01L23/498 , H01L23/00
CPC分类号： H01L23/53295 , H01L23/49822 , H01L24/13 , H01L2224/11
摘要： A foundation portion and a conductive base portion disposed on the foundation portion are formed on a temporary support, a semiconductor element electrically connected to the base portion is disposed on a side of the temporary support on which the foundation portion and the base portion are formed, and an insulating layer coming into a state of burying the foundation portion, the base portion, and the semiconductor element is formed on the temporary support. Subsequently, surfaces of the foundation portion and the insulating layer on a side of the temporary support are exposed by removing the temporary support, and the exposed foundation portion is further removed, thereby disposing the base portion in a state of being more recessed than the surface of the insulating layer. An external connection terminal is formed on the exposed base portion to manufacture the semiconductor package.
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公开(公告)号：US20230152839A1
公开(公告)日：2023-05-18
申请号：US18156148
申请日：2023-01-18
发明人： Kenjiro MATOBA , Kazuhiro YAMASHITA
IPC分类号： G06F1/04 , H03K19/0185
CPC分类号： G06F1/04 , H03K19/018521
摘要： An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
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17.发明授权公开(公告)号：US11611686B2
公开(公告)日：2023-03-21
申请号：US16728064
申请日：2019-12-27
发明人： Tomoyuki Ichikawa
摘要： A video signal processing device including a video signal dividing unit that divides a video signal into first to k-th division video signals (k is an integer of 2 or more) for each frame; a video change detecting unit that detects, for each of the first to k-th division video signals, whether or not there has occurred a change in the video signal between the frames, and generates first to k-th video change detection signals representing the detection results; and a video no-change determining unit that generates a video no-change signal indicating that there is no change in the video signal when the number of video change detection signals indicating that there is no change among the first to k-th video change detection signals is greater than a predetermined number.
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公开(公告)号：US11610962B2
公开(公告)日：2023-03-21
申请号：US17211915
申请日：2021-03-25
发明人： Takamitsu Furukawa
IPC分类号： H01L49/02 , H01L23/522 , H01L27/08
摘要： A semiconductor device including: a semiconductor substrate; a seed layer that is formed on the semiconductor substrate; and wiring that is formed on the seed layer and includes parallel row portions that are arranged at intervals from each other, and in which penetration passages that penetrate the parallel row portions in a direction in which the parallel rows lined up are formed in the parallel row portions.
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公开(公告)号：US11567526B2
公开(公告)日：2023-01-31
申请号：US17737620
申请日：2022-05-05
发明人： Kenjiro Matoba , Kazuhiro Yamashita
IPC分类号： G06F1/04 , H03K19/0185
摘要： An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
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公开(公告)号：US11551624B2
公开(公告)日：2023-01-10
申请号：US17319074
申请日：2021-05-12
发明人： Hiroaki Ishii , Shinichi Fukuzako
摘要： Provided is a display panel, a source driver that generates a gradation voltage signal based on an image data signal, a timing controller that supplies the image data signal to the source driver, and an illumination drive unit that controls an amount of light of a backlight that illuminates each of a plurality of areas formed by dividing a display screen in the display panel. The source driver or the timing controller calculates feature values of the image data signal corresponding to each of the plurality of areas of the display panel and supplies a dimming data signal representing the amount of light of the backlight according to the feature values of each area to the illumination drive unit. The illumination drive unit controls the amount of light of the backlight for each of the plurality of areas based on the dimming data signal.
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